summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
diff options
context:
space:
mode:
authorMatt Arsenault <Matthew.Arsenault@amd.com>2020-01-07 13:32:03 -0500
committerMatt Arsenault <arsenm2@gmail.com>2020-01-07 16:36:31 -0500
commit4844bf0fe2c83859cde322a2f952ac8337bdff05 (patch)
treec7d3442f81254a5b13ffc731286f86eb8ef55a95 /llvm/lib/Target
parent73d93617d3ae23bad232fa3a160c638728c71c01 (diff)
downloadbcm5719-llvm-4844bf0fe2c83859cde322a2f952ac8337bdff05.tar.gz
bcm5719-llvm-4844bf0fe2c83859cde322a2f952ac8337bdff05.zip
AMDGPU: Apply i16 add->sub pattern with zext to i32
This was only applying the deeper nested zext pattern, and missing the special case code size fold.
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/AMDGPU/VOP2Instructions.td23
1 files changed, 15 insertions, 8 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index 87a2cbad413..064b2666554 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -766,7 +766,22 @@ def : GCNPat <
let Predicates = [Has16BitInsts] in {
+// Undo sub x, c -> add x, -c canonicalization since c is more likely
+// an inline immediate than -c.
+// TODO: Also do for 64-bit.
+def : GCNPat<
+ (add i16:$src0, (i16 NegSubInlineConst16:$src1)),
+ (V_SUB_U16_e64 $src0, NegSubInlineConst16:$src1)
+>;
+
+
let Predicates = [Has16BitInsts, isGFX7GFX8GFX9] in {
+
+def : GCNPat<
+ (i32 (zext (add i16:$src0, (i16 NegSubInlineConst16:$src1)))),
+ (V_SUB_U16_e64 $src0, NegSubInlineConst16:$src1)
+>;
+
defm : Arithmetic_i16_0Hi_Pats<add, V_ADD_U16_e64>;
defm : Arithmetic_i16_0Hi_Pats<mul, V_MUL_LO_U16_e64>;
defm : Arithmetic_i16_0Hi_Pats<sub, V_SUB_U16_e64>;
@@ -788,14 +803,6 @@ def : GCNPat <
/*src1mod*/(i32 0), /*src1*/(i32 -1), $src)
>;
-// Undo sub x, c -> add x, -c canonicalization since c is more likely
-// an inline immediate than -c.
-// TODO: Also do for 64-bit.
-def : GCNPat<
- (add i16:$src0, (i16 NegSubInlineConst16:$src1)),
- (V_SUB_U16_e64 $src0, NegSubInlineConst16:$src1)
->;
-
} // End Predicates = [Has16BitInsts]
OpenPOWER on IntegriCloud