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path: root/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
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* Fix a lot of confusion around inserting nops on empty functions.Rafael Espindola2014-09-151-5/+0
* Provide an implementation of getNoopForMachoTarget for SPARC.Brad Smith2014-09-111-0/+5
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-5/+5
* [cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth2014-04-221-3/+2
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-2/+2
* [Sparc] Add support for parsing annulled branch instructions.Venkatraman Govindaraju2014-03-011-0/+4
* [SparcV9] Use correct register class (I64RegClass) to hold the address of _G...Venkatraman Govindaraju2014-01-291-2/+3
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-1/+5
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-5/+1
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-1/+5
* [Sparc] Correct the floating point conditional code mapping in GetOppositeBra...Venkatraman Govindaraju2013-10-041-8/+8
* [Sparc] Implement spill and load for long double(f128) registers.Venkatraman Govindaraju2013-09-021-18/+64
* [Sparc]: Add memory operands for the frame references in the storeRegToStackSlotVenkatraman Govindaraju2013-06-261-8/+30
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-161-12/+0
* [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc bac...Venkatraman Govindaraju2013-06-081-4/+22
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-1/+1
* Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,Venkatraman Govindaraju2013-06-041-8/+8
* Implement spill and fill of I64Regs.Jakob Stoklund Olesen2013-05-201-2/+9
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-2/+2
* Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-6/+6
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Fix some leftover control reaches end of non-void function warnings.Benjamin Kramer2012-01-101-0/+1
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-101-1/+0
* Sparc: Implement emitFrameIndexDebugValue and getDebugValue Location hooks.Venkatraman Govindaraju2011-12-251-0/+11
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-1/+1
* Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() sinceVenkatraman Govindaraju2011-12-031-1/+1
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-11/+0
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-4/+15
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-011-2/+2
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-1/+2
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-281-1/+4
* Implement AnalyzeBranch in Sparc Backend.Venkatraman Govindaraju2011-01-161-5/+190
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-161-40/+0
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-111-55/+0
* Replace copyRegToReg with copyPhysReg for Sparc.Jakob Stoklund Olesen2010-07-111-22/+14
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-4/+3
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-4/+2
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-2/+4
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-5/+5
* several major improvements to the sparc backend: support for weak linkageChris Lattner2009-09-151-0/+24
* Remove unused member functions.Eli Friedman2009-07-241-44/+0
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-4/+4
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-4/+5
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the...Evan Cheng2009-07-011-2/+5
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-131-6/+6
* Factor out the code to add a MachineOperand to a MachineInstrBuilder.Dan Gohman2009-02-181-22/+4
* Remove non-DebugLoc versions of buildMI from Sparc.Dale Johannesen2009-02-131-1/+3
* Eliminate a couple of non-DebugLoc BuildMI variants.Dale Johannesen2009-02-121-2/+4
* Move debug loc info along when the spiller creates new instructions.Bill Wendling2009-02-121-26/+45
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