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authorDale Johannesen <dalej@apple.com>2009-02-12 23:08:38 +0000
committerDale Johannesen <dalej@apple.com>2009-02-12 23:08:38 +0000
commit6b8c76a910ecbd7f5248e00b231e2749448c49db (patch)
tree4f09c3992879a2cc8a21ac55ed20d1a4f329da6b /llvm/lib/Target/Sparc/SparcInstrInfo.cpp
parent6b63074de90b1e8ce93404a5445a389a1d6471d5 (diff)
downloadbcm5719-llvm-6b8c76a910ecbd7f5248e00b231e2749448c49db.tar.gz
bcm5719-llvm-6b8c76a910ecbd7f5248e00b231e2749448c49db.zip
Eliminate a couple of non-DebugLoc BuildMI variants.
Modify callers. llvm-svn: 64409
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Sparc/SparcInstrInfo.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
index cbfde30ba16..9a3ff12bf6a 100644
--- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -167,6 +167,7 @@ void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const {
unsigned Opc = 0;
+ DebugLoc DL = DebugLoc::getUnknownLoc();
if (RC == SP::IntRegsRegisterClass)
Opc = SP::STri;
else if (RC == SP::FPRegsRegisterClass)
@@ -175,7 +176,7 @@ void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
Opc = SP::STDFri;
else
assert(0 && "Can't load this register");
- MachineInstrBuilder MIB = BuildMI(MF, get(Opc));
+ MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
MachineOperand &MO = Addr[i];
if (MO.isReg())
@@ -222,7 +223,8 @@ void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
Opc = SP::LDDFri;
else
assert(0 && "Can't load this register");
- MachineInstrBuilder MIB = BuildMI(MF, get(Opc), DestReg);
+ DebugLoc DL = DebugLoc::getUnknownLoc();
+ MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
MachineOperand &MO = Addr[i];
if (MO.isReg())
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