summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
diff options
context:
space:
mode:
authorTorok Edwin <edwintorok@gmail.com>2009-07-11 20:10:48 +0000
committerTorok Edwin <edwintorok@gmail.com>2009-07-11 20:10:48 +0000
commit56d065972602c45a4109617f32eb8605e5017c5e (patch)
treeb74a0d6b8aa7cbcafe15f8128196d5afc60cf732 /llvm/lib/Target/Sparc/SparcInstrInfo.cpp
parent3085b57bb8e47561fc290ea6bbbea92f08250a2d (diff)
downloadbcm5719-llvm-56d065972602c45a4109617f32eb8605e5017c5e.tar.gz
bcm5719-llvm-56d065972602c45a4109617f32eb8605e5017c5e.zip
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Sparc/SparcInstrInfo.cpp9
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
index 12c286af942..451c458ac0a 100644
--- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -17,6 +17,7 @@
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Support/ErrorHandling.h"
#include "SparcGenInstrInfo.inc"
using namespace llvm;
@@ -160,7 +161,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
BuildMI(MBB, I, DL, get(SP::STDFri)).addFrameIndex(FI).addImm(0)
.addReg(SrcReg, getKillRegState(isKill));
else
- assert(0 && "Can't store this register to stack slot");
+ LLVM_UNREACHABLE("Can't store this register to stack slot");
}
void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
@@ -177,7 +178,7 @@ void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
else if (RC == SP::DFPRegsRegisterClass)
Opc = SP::STDFri;
else
- assert(0 && "Can't load this register");
+ LLVM_UNREACHABLE("Can't load this register");
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
MIB.addOperand(Addr[i]);
@@ -200,7 +201,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
else if (RC == SP::DFPRegsRegisterClass)
BuildMI(MBB, I, DL, get(SP::LDDFri), DestReg).addFrameIndex(FI).addImm(0);
else
- assert(0 && "Can't load this register from stack slot");
+ LLVM_UNREACHABLE("Can't load this register from stack slot");
}
void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
@@ -215,7 +216,7 @@ void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
else if (RC == SP::DFPRegsRegisterClass)
Opc = SP::LDDFri;
else
- assert(0 && "Can't load this register");
+ LLVM_UNREACHABLE("Can't load this register");
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
for (unsigned i = 0, e = Addr.size(); i != e; ++i)
OpenPOWER on IntegriCloud