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path: root/llvm/lib/Target/R600
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* R600 -> AMDGPU renameTom Stellard2015-06-13121-44549/+0
* R600/SI: Add assembler support for FLAT instructionsTom Stellard2015-06-124-89/+194
* Remove a hack that tries to align '*'.Rafael Espindola2015-06-121-1/+1
* Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.Daniel Sanders2015-06-112-19/+20
* [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.Ahmed Bougacha2015-06-114-17/+17
* Replace string GNU Triples with llvm::Triple in computeDataLayout(). NFC.Daniel Sanders2015-06-111-5/+4
* R600/SI: Define latency for flat instructionsTom Stellard2015-06-111-0/+1
* R600/SI: Move flat instruction defs to CIInstructions.tdTom Stellard2015-06-112-108/+110
* Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and create*MC...Daniel Sanders2015-06-104-14/+14
* Replace string GNU Triples with llvm::Triple in MCAsmBackend subclasses and c...Daniel Sanders2015-06-102-3/+3
* R600: Switch to using generic min / max nodes.Matt Arsenault2015-06-096-56/+39
* MC: Add target hook to control symbol quotingMatt Arsenault2015-06-091-1/+1
* Fix clang-cl self-host -Wc++11-narrowing bugReid Kleckner2015-06-081-1/+1
* [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFCKeno Fischer2015-06-082-8/+8
* MC: Clean up the naming for MCMachObjectWriter. NFC.Jim Grosbach2015-06-041-1/+1
* MC: Clean up naming in MCObjectWriter. NFC.Jim Grosbach2015-06-041-3/+3
* R600/SI: Reimplement isLegalAddressingModeMatt Arsenault2015-06-042-31/+70
* R600/SI: Fix some cases for load / store of halfMatt Arsenault2015-06-042-3/+42
* Replace custom fixed endian to raw_ostream emission with EndianStream.Benjamin Kramer2015-06-041-6/+3
* Replace string GNU Triples with llvm::Triple in MCAsmInfo subclasses and crea...Daniel Sanders2015-06-042-3/+3
* R600: Re-enable sub-reg livenessTom Stellard2015-06-041-1/+1
* R600/SI: Don't hardcode pointer typeMatt Arsenault2015-06-011-4/+5
* Add address space argument to isLegalAddressingModeMatt Arsenault2015-06-012-2/+2
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-302-5/+5
* R600: Rely on TypeLegalizer to use divrem instead of div/remJan Vesely2015-05-271-43/+0
* R600: Use SIGN_EXTEND_INREG for SEXT loadsJan Vesely2015-05-261-6/+3
* R600: Add comments to subword private address load lowering codeJan Vesely2015-05-261-0/+13
* R600/SI: Add assembler support for all CI and VI VOP2 instructionsTom Stellard2015-05-263-3/+70
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-262-3/+3
* Remove most uses of MCSectionData from MCAssembler.Rafael Espindola2015-05-261-1/+1
* Turn MCSectionData into a field of MCSection.Rafael Espindola2015-05-251-1/+1
* R600/SI: Remove some unnecessary patterns from VINTRP multiclassTom Stellard2015-05-252-11/+9
* R600/SI: Fix bug with v_interp_p1_f32 instructions on 16 bank lds chipsTom Stellard2015-05-255-10/+50
* R600/SI: Use NAME rather than opName as the key to the MCOpcode tablesTom Stellard2015-05-252-7/+7
* Add target hook to allow merging stores of nonzero constantsMatt Arsenault2015-05-242-0/+10
* Move alignment from MCSectionData to MCSection.Rafael Espindola2015-05-211-3/+3
* Simplify IRBuilder::CreateCall* by using ArrayRef+initializer_list/braced ini...David Blaikie2015-05-181-6/+5
* MC: Clean up method names in MCContext.Jim Grosbach2015-05-184-6/+6
* MC: MCCodeGenInfo naming update. NFC.Jim Grosbach2015-05-151-1/+1
* MC: Update MCCodeEmitter naming. NFC.Jim Grosbach2015-05-153-5/+5
* MC: Update MCFixup naming. NFC.Jim Grosbach2015-05-151-2/+2
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-132-12/+12
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-132-3/+3
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-132-3/+3
* R600/SI: Fix bug in VGPR spillingTom Stellard2015-05-125-76/+69
* R600/SI: add pass to mark CF live ranges as non-spillableTom Stellard2015-05-124-0/+110
* R600/SI: Update tablegen defs to avoid restoring spilled sgprs to m0Tom Stellard2015-05-122-9/+4
* R600/SI: Remove M0Reg register classTom Stellard2015-05-123-4/+1
* R600/SI: Remove explicit m0 operand from DS instructionsTom Stellard2015-05-126-118/+259
* R600/SI: Remove explicit m0 operand from v_interp instructionsTom Stellard2015-05-126-33/+59
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