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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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* [PowerPC] Support the nest parameter attributeHal Finkel2015-07-121-15/+47
* Allow {e,r}bp as the target of {read,write}_register.Pat Gavlin2015-07-091-2/+2
* Remove getDataLayout() from TargetLoweringMehdi Amini2015-07-091-13/+11
* Make isLegalAddressingMode() taking DataLayout as an argumentMehdi Amini2015-07-091-2/+2
* Make getByValTypeAlignment() taking DataLayout as an argumentMehdi Amini2015-07-091-1/+2
* Make TargetLowering::getShiftAmountTy() taking DataLayout as an argumentMehdi Amini2015-07-091-1/+1
* Make TargetLowering::getPointerTy() taking DataLayout as an argumentMehdi Amini2015-07-091-52/+60
* IR: Do not consider available_externally linkage to be linker-weak.Peter Collingbourne2015-07-051-4/+2
* [TargetLowering] StringRefize asm constraint getters.Benjamin Kramer2015-07-051-2/+2
* Modified a comment about the reason for the patch (removed commented code).Nemanja Ivanovic2015-06-301-2/+1
* Fixes a bug with __builtin_vsx_lxvdw4x on Little Endian systemsNemanja Ivanovic2015-06-301-1/+4
* PPCISelLowering.cpp: Appease PR23956. [-Wdocumentation]NAKAMURA Takumi2015-06-251-6/+6
* [PPC] Implement vmrgew and vmrgow instructionsKit Barton2015-06-251-2/+99
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
* Add address space argument to isLegalAddressingModeMatt Arsenault2015-06-011-1/+2
* This patch adds support for the vector quadword add/sub instructions introducedKit Barton2015-05-251-9/+2
* [PPC64] Add support for clrbhrb, mfbhrbe, rfebb.Bill Schmidt2015-05-221-0/+3
* [PPC64] Handle vpkudum mask pattern correctly when vpkudum isn't availableBill Schmidt2015-05-211-1/+8
* Simplify IRBuilder::CreateCall* by using ArrayRef+initializer_list/braced ini...David Blaikie2015-05-181-6/+4
* [PPC64] Add vector pack/unpack support from ISA 2.07Bill Schmidt2015-05-161-2/+47
* Fix compile errorArnold Schwaighofer2015-05-091-1/+1
* ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not no...Arnold Schwaighofer2015-05-081-0/+1
* Change getTargetNodeName() to produce compiler warnings for missing cases, fi...Matthias Braun2015-05-071-2/+10
* Add VSX Scalar loads and stores to the PPC back endNemanja Ivanovic2015-05-071-3/+18
* This patch adds ABI support for v1i128 data type.Kit Barton2015-05-051-7/+22
* Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"Sergey Dmitrouk2015-04-281-156/+162
* Revert "[DebugInfo] Add debug locations to constant SD nodes"Daniel Jasper2015-04-281-162/+156
* [DebugInfo] Add debug locations to constant SD nodesSergey Dmitrouk2015-04-281-156/+162
* Allow memory intrinsics to be tail callsKrzysztof Parzyszek2015-04-131-2/+2
* Add direct moves to/from VSR and exploit them for FP/INT conversionsNemanja Ivanovic2015-04-111-0/+78
* [PowerPC] Don't crash on PPC32 i64 fp_to_uint on modern coresHal Finkel2015-04-101-0/+1
* [PowerPC] Enable splat generation for BUILD_VECTOR with little endianBill Schmidt2015-04-031-33/+2
* [PowerPC] Don't use a vector preferred memory type at -O0Hal Finkel2015-03-311-15/+17
* Add Hardware Transactional Memory (HTM) SupportKit Barton2015-03-251-0/+6
* [APInt] Add an isSplat helper and use it in some places.Benjamin Kramer2015-03-251-11/+4
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-1/+2
* Add support for part-word atomics for PPCNemanja Ivanovic2015-03-101-27/+83
* Change the generation of the vmuluwm instruction to be based on the MUL opcode.Kit Barton2015-03-101-1/+6
* While reviewing the changes to Clang to add builtin support for the vsld, vsr...Kit Barton2015-03-051-4/+8
* Add the following 64-bit vector integer arithmetic instructions added in POWER8:Kit Barton2015-03-031-8/+70
* Make some non-constant static variables non-static or fully const.Benjamin Kramer2015-03-011-34/+9
* [PowerPC] Use vector types for memcpy and friends (sometimes)Hal Finkel2015-02-271-2/+25
* getRegForInlineAsmConstraint wants to use TargetRegisterInfo forEric Christopher2015-02-261-7/+6
* Remove an argument-less call to getSubtargetImpl from TargetLoweringBase.Eric Christopher2015-02-261-1/+1
* [PowerPC] Make LDtocL and friends invariant loadsHal Finkel2015-02-251-16/+20
* [PowerPC] Cleanup unused target-specific SDAG nodesHal Finkel2015-02-251-3/+0
* Silencing a "result of 32-bit shift implicitly converted to 64 bits (was 64-b...Aaron Ballman2015-02-251-1/+1
* Silencing a -Wsign-compare warning triggered in MSVC; NFC.Aaron Ballman2015-02-251-1/+1
* [PowerPC] Add support for the QPX vector instruction setHal Finkel2015-02-251-48/+1097
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