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| author | Pat Gavlin <pagavlin@microsoft.com> | 2015-07-09 17:40:29 +0000 |
|---|---|---|
| committer | Pat Gavlin <pagavlin@microsoft.com> | 2015-07-09 17:40:29 +0000 |
| commit | a717f255b6e1c6cfdb7c96d2b9619e8c6edaa074 (patch) | |
| tree | e36d1f779d9147d3ae496539571e14eec11c0fc9 /llvm/lib/Target/PowerPC/PPCISelLowering.cpp | |
| parent | e2361d4a184a57fb3e96294918dfbdc9f7cb2d72 (diff) | |
| download | bcm5719-llvm-a717f255b6e1c6cfdb7c96d2b9619e8c6edaa074.tar.gz bcm5719-llvm-a717f255b6e1c6cfdb7c96d2b9619e8c6edaa074.zip | |
Allow {e,r}bp as the target of {read,write}_register.
This patch allows the read_register and write_register intrinsics to
read/write the RBP/EBP registers on X86 iff the targeted register is
the frame pointer for the containing function.
Differential Revision: http://reviews.llvm.org/D10977
llvm-svn: 241827
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 47b42f54955..775ef41f490 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -11031,8 +11031,8 @@ SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op, // FIXME? Maybe this could be a TableGen attribute on some registers and // this table could be generated automatically from RegInfo. -unsigned PPCTargetLowering::getRegisterByName(const char* RegName, - EVT VT) const { +unsigned PPCTargetLowering::getRegisterByName(const char* RegName, EVT VT, + SelectionDAG &DAG) const { bool isPPC64 = Subtarget.isPPC64(); bool isDarwinABI = Subtarget.isDarwinABI(); |
