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path: root/llvm/lib/Target/Mips/MipsISelLowering.cpp
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* Add register Mips::GP to the list of reserved registers if target is bare-metalAkira Hatanaka2012-08-221-2/+2
* Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.Akira Hatanaka2012-07-311-50/+3
* When store nodes or memcpy nodes are created to copy the function callAkira Hatanaka2012-07-311-46/+31
* Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined asAkira Hatanaka2012-07-311-2/+0
* Pass the correct call frame size to callseq_start node. This is needed toAkira Hatanaka2012-07-261-15/+10
* Fix call setup for PIC.Akira Hatanaka2012-07-261-5/+13
* Add basic ability to setup call frame, and make procedure calls.Akira Hatanaka2012-07-231-1/+4
* Revert accidental commit.Akira Hatanaka2012-07-211-4/+1
* Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind.Akira Hatanaka2012-07-211-1/+4
* Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.Akira Hatanaka2012-07-111-3/+16
* Lower RETURNADDR node in Mips backend.Akira Hatanaka2012-07-111-0/+18
* Make register Mips::RA allocatable if not in mips16 mode.Akira Hatanaka2012-07-101-5/+4
* mips32 long long register inline asm constraint support.Jack Carter2012-07-021-0/+2
* Revert " mips32 long long register inline asm constraint support." asEric Christopher2012-07-021-2/+0
* mips32 long long register inline asm constraint support.Jack Carter2012-07-021-0/+2
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-141-44/+44
* Implement a DAGCombine in MipsISelLowering.cpp which transforms the followingAkira Hatanaka2012-06-131-0/+30
* Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.Akira Hatanaka2012-06-131-0/+12
* Simplify CreateLoadLR and CreateStoreLR in MipsISelLowering.cpp.Akira Hatanaka2012-06-131-11/+6
* Implement fastcc calling convention for MIPS.Akira Hatanaka2012-06-131-3/+7
* Fix a bug in MipsTargetLowering::LowerLOAD. A shift-right-logical node isAkira Hatanaka2012-06-041-1/+2
* MIPS TLS: use the model selected by TargetMachine::getTLSModel().Hans Wennborg2012-06-041-3/+4
* remove an unused variable.Chris Lattner2012-06-021-1/+1
* Set operation actions for load/store nodes in the Mips backend.Akira Hatanaka2012-06-021-0/+11
* Define functions MipsTargetLowering::LowerLOAD and LowerSTORE whichAkira Hatanaka2012-06-021-0/+138
* Define Mips specific unaligned load/store nodes.Akira Hatanaka2012-06-021-0/+8
* Expand unaligned i16 loads/stores for the Mips backend.Akira Hatanaka2012-06-021-1/+0
* Cleanup and factoring of mips16 tablegen classes. Make register classesAkira Hatanaka2012-05-311-0/+5
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-251-9/+14
* Make the following changes in MipsISelLowering.cpp:Akira Hatanaka2012-05-121-8/+8
* Expand 64-bit shifts if target ABI is O32.Akira Hatanaka2012-05-091-3/+81
* Add support for the 'x' constraint.Eric Christopher2012-05-071-1/+8
* Add support for the 'l' constraint.Eric Christopher2012-05-071-0/+7
* Add support for the 'c' constraint.Eric Christopher2012-05-071-1/+13
* Add support for the 'P' constraint.Eric Christopher2012-05-071-0/+11
* Add support for the 'O' constraint.Eric Christopher2012-05-071-0/+11
* Add support for the 'N' inline asm constraint.Eric Christopher2012-05-071-0/+11
* Add support for the 'L' inline asm constraint.Eric Christopher2012-05-071-0/+11
* Add support for the inline asm constraint 'K'.Eric Christopher2012-05-071-0/+11
* Support the 'J' constraint.Eric Christopher2012-05-071-0/+11
* Add support for the 'I' inline asm constraint. Also add testsEric Christopher2012-05-071-0/+39
* Allow 64 bit integer values in gpu registers if arch and abi are 64 bit.Eric Christopher2012-05-071-2/+4
* When using inline asm constraints representingEric Christopher2012-05-071-1/+1
* Make ARM and Mips use TargetMachine::getTLSModel()Hans Wennborg2012-05-041-3/+6
* llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build o...NAKAMURA Takumi2012-04-211-0/+2
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-19/+19
* Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,Akira Hatanaka2012-04-111-0/+5
* Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.Akira Hatanaka2012-04-111-0/+63
* Fix bugs in lowering of FCOPYSIGN nodes.Akira Hatanaka2012-04-111-52/+91
* Reapply 154038 without the failing test.Akira Hatanaka2012-04-041-3/+3
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