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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-04 17:46:29 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-06-04 17:46:29 +0000 |
| commit | 6734685f218d7b44801d2c552cf3bcd3a02d8e0c (patch) | |
| tree | 43244e1a2b90ca2fc7301d79887acd88eb2083df /llvm/lib/Target/Mips/MipsISelLowering.cpp | |
| parent | e3f15c98d1c7de344268ca43e3fb3e54bec686a8 (diff) | |
| download | bcm5719-llvm-6734685f218d7b44801d2c552cf3bcd3a02d8e0c.tar.gz bcm5719-llvm-6734685f218d7b44801d2c552cf3bcd3a02d8e0c.zip | |
Fix a bug in MipsTargetLowering::LowerLOAD. A shift-right-logical node is
inserted after the shift-left-logical node.
llvm-svn: 157937
Diffstat (limited to 'llvm/lib/Target/Mips/MipsISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index d44bdca03d7..1793a0fa218 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -2144,7 +2144,8 @@ SDValue MipsTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { DebugLoc DL = LD->getDebugLoc(); SDValue Const32 = DAG.getConstant(32, MVT::i32); SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32); - SDValue Ops[] = { SLL, LWR.getValue(1) }; + SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); + SDValue Ops[] = { SRL, LWR.getValue(1) }; return DAG.getMergeValues(Ops, 2, DL); } |
