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path: root/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
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* [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG fo...QingShan Zhang2020-01-031-0/+7
* [Hexagon] Generate vector min/max for HVXKrzysztof Parzyszek2019-08-151-0/+24
* [Hexagon] Split vector pairs for ISD::SIGN_EXTEND and ISD::ZERO_EXTENDKrzysztof Parzyszek2019-02-201-0/+2
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [SelectionDAG] Remove special methods for creating *_EXTEND_VECTOR_INREG node...Craig Topper2018-11-041-1/+2
* [Hexagon] Use shuffles when lowering "gather" shufflevectorsKrzysztof Parzyszek2018-09-121-0/+70
* [Hexagon] Split CTPOP of vector pairsKrzysztof Parzyszek2018-06-061-0/+1
* [Hexagon] Avoid UB when shifting unsigned integer left by 32Krzysztof Parzyszek2018-06-011-3/+4
* [Hexagon] Select HVX code for vector CTPOP, CTLZ, and CTTZKrzysztof Parzyszek2018-06-011-15/+52
* [Hexagon] Mark HVX vector predicate bitwise ops as legal, add patternsKrzysztof Parzyszek2018-05-161-11/+27
* [Hexagon] Improve HVX instruction selection (bitcast, vsplat)Krzysztof Parzyszek2018-04-201-3/+1
* [Hexagon] Use legal types when lowering CONCAT_VECTORS via BUILD_VECTORKrzysztof Parzyszek2018-04-191-0/+26
* [Hexagon] Rewrite non-HVX unaligned loads as pairs of aligned onesKrzysztof Parzyszek2018-03-071-58/+2
* [Hexagon] Split HVX vector pair loads/stores, expand unaligned loadsKrzysztof Parzyszek2018-02-141-15/+124
* [Hexagon] Extract HVX lowering and selection into HVX-specific files, NFCKrzysztof Parzyszek2018-02-061-12/+210
* [Hexagon] Lower concat of more than 2 vectors into build_vectorKrzysztof Parzyszek2018-02-061-6/+15
* [Hexagon] Remove leftover assertKrzysztof Parzyszek2018-02-061-3/+1
* [Hexagon] Split HVX operations on vector pairsKrzysztof Parzyszek2018-02-061-26/+125
* [Hexagon] Add helper functions to identify single/pair vector types, NFCKrzysztof Parzyszek2018-02-061-3/+15
* [Hexagon] Handle lowering of SETCC via setCondCodeActionKrzysztof Parzyszek2018-02-061-69/+29
* [Hexagon] Use V6_vmpyih for halfword multiplicationKrzysztof Parzyszek2018-02-051-5/+6
* [Hexagon] Rename HexagonISelLowering::getNode to getInstr, NFCKrzysztof Parzyszek2018-01-311-33/+33
* [Hexagon] Implement HVX codegen for vector shiftsKrzysztof Parzyszek2018-01-311-0/+6
* [Hexagon] Handle SETCC on vector pairs in loweringKrzysztof Parzyszek2018-01-311-1/+13
* [Hexagon] Handle BUILD_VECTOR from undef values in buildHvxVectorRegKrzysztof Parzyszek2018-01-311-1/+4
* [Hexagon] Generate constant splats instead of loads from constant poolKrzysztof Parzyszek2018-01-261-17/+20
* [NFC] fix trivial typos in comments and documentsHiroshi Inoue2018-01-261-1/+1
* Remove set but unused variable IsUndef.Eric Christopher2018-01-241-2/+1
* [Hexagon] Fix unused variable warning in release buildKrzysztof Parzyszek2018-01-231-0/+1
* [Hexagon] Implement basic vector operations on vectors vNi1Krzysztof Parzyszek2018-01-231-84/+520
* [Hexagon] Implement signed and unsigned multiply-high for vectorsKrzysztof Parzyszek2018-01-151-3/+108
* [Hexagon] Add a bitcast to required type in LowerHvxMulKrzysztof Parzyszek2018-01-051-1/+2
* [Hexagon] Allow construction of HVX vector predicatesKrzysztof Parzyszek2017-12-201-26/+108
* [Hexagon] Generate HVX code for vector sign-, zero- and any-extendsKrzysztof Parzyszek2017-12-181-0/+7
* [Hexagon] Generate HVX code for comparisons and selectsKrzysztof Parzyszek2017-12-141-0/+71
* [Hexagon] Remove vectors of i64 from valid HVX typesKrzysztof Parzyszek2017-12-141-2/+2
* [Hexagon] Crash in instruction selection for insert_vector_elt for HVXKrzysztof Parzyszek2017-12-111-1/+1
* [Hexagon] Generate HVX code for basic arithmetic operationsKrzysztof Parzyszek2017-12-071-1/+85
* [Hexagon] Suppress warnings on unused variables defind for asserts.Tim Shen2017-12-061-0/+2
* [Hexagon] Generate HVX code for vector construction and accessKrzysztof Parzyszek2017-12-061-0/+299
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