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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-12-18 18:32:27 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-12-18 18:32:27 +0000
commit6b589e593d7af86f3b32d767ae98e16fa8ddb0ff (patch)
treec7c35eafea29c6a6f80729f0c7099adca7024517 /llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
parentf947137ed0b6486cb0dc8cd47496e98899fc2987 (diff)
downloadbcm5719-llvm-6b589e593d7af86f3b32d767ae98e16fa8ddb0ff.tar.gz
bcm5719-llvm-6b589e593d7af86f3b32d767ae98e16fa8ddb0ff.zip
[Hexagon] Generate HVX code for vector sign-, zero- and any-extends
Implement any-extend as zero-extend. llvm-svn: 321004
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
index 652dffce841..c1d44cb0e7d 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
@@ -454,3 +454,10 @@ HexagonTargetLowering::LowerHvxSetCC(SDValue Op, SelectionDAG &DAG) const {
return Negate ? getNode(Hexagon::V6_pred_not, dl, ResTy, {CmpV}, DAG)
: CmpV;
}
+
+SDValue
+HexagonTargetLowering::LowerHvxExtend(SDValue Op, SelectionDAG &DAG) const {
+ // Sign- and zero-extends are legal.
+ assert(Op.getOpcode() == ISD::ANY_EXTEND_VECTOR_INREG);
+ return DAG.getZeroExtendVectorInReg(Op.getOperand(0), SDLoc(Op), ty(Op));
+}
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