| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | CodeGen: Use LLT instead of EVT in getRegisterByName | Matt Arsenault | 2020-01-09 | 1 | -1/+1 |
| * | DAG: Add function context to isFMAFasterThanFMulAndFAdd | Matt Arsenault | 2019-11-19 | 1 | -1/+2 |
| * | TLI: Remove DAG argument from getRegisterByName | Matt Arsenault | 2019-10-01 | 1 | -2/+2 |
| * | [Hexagon] Generate min/max instructions for 64-bit vectors | Krzysztof Parzyszek | 2019-08-16 | 1 | -0/+2 |
| * | [Hexagon] Generate vector min/max for HVX | Krzysztof Parzyszek | 2019-08-15 | 1 | -1/+6 |
| * | [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold | Roman Lebedev | 2019-07-24 | 1 | -0/+2 |
| * | [Hexagon] Custom-lower UADDO(x, 1) and USUBO(x, 1) | Krzysztof Parzyszek | 2019-07-01 | 1 | -0/+1 |
| * | [TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR... | Simon Pilgrim | 2019-06-12 | 1 | -1/+1 |
| * | [TargetLowering] Change getOptimalMemOpType to take a function attribute list | Sjoerd Meijer | 2019-04-30 | 1 | -1/+1 |
| * | [TargetLowering] Add code size information on isFPImmLegal. NFC | Adhemerval Zanella | 2019-03-18 | 1 | -1/+2 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [TargetLowering] Change TargetLoweringBase::getPreferredVectorAction to take ... | Craig Topper | 2018-11-05 | 1 | -1/+1 |
| * | [Hexagon] Do not reduce load size for globals in small-data | Krzysztof Parzyszek | 2018-11-02 | 1 | -0/+3 |
| * | [AtomicExpandPass]: Add a hook for custom cmpxchg expansion in IR | Alex Bradbury | 2018-09-19 | 1 | -1/+2 |
| * | Add support for getRegisterByName. | Sid Manning | 2018-09-07 | 1 | -0/+3 |
| * | Revert [Hexagon] Add support for getRegisterByName. | Sid Manning | 2018-09-03 | 1 | -3/+0 |
| * | [Hexagon] Add support for getRegisterByName. | Sid Manning | 2018-08-31 | 1 | -0/+3 |
| * | [Hexagon] Diagnose misaligned absolute loads and stores | Krzysztof Parzyszek | 2018-08-08 | 1 | -1/+7 |
| * | [SelectionDAG] Provide default expansion for rotates | Krzysztof Parzyszek | 2018-06-12 | 1 | -0/+1 |
| * | [Hexagon] Select HVX code for vector CTPOP, CTLZ, and CTTZ | Krzysztof Parzyszek | 2018-06-01 | 1 | -0/+1 |
| * | [SelectionDAG] Expand UADDO/USUBO into ADD/SUBCARRY if legal for target | Krzysztof Parzyszek | 2018-06-01 | 1 | -0/+3 |
| * | [Hexagon] Improve HVX instruction selection (bitcast, vsplat) | Krzysztof Parzyszek | 2018-04-20 | 1 | -1/+3 |
| * | [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code... | Craig Topper | 2018-03-29 | 1 | -1/+1 |
| * | Fix layering by moving ValueTypes.h from CodeGen to IR | David Blaikie | 2018-03-23 | 1 | -1/+1 |
| * | Fix layering of MachineValueType.h by moving it from CodeGen to Support | David Blaikie | 2018-03-23 | 1 | -1/+1 |
| * | [Hexagon] Counting leading/trailing bits is cheap | Krzysztof Parzyszek | 2018-03-12 | 1 | -0/+4 |
| * | [Hexagon] Rewrite non-HVX unaligned loads as pairs of aligned ones | Krzysztof Parzyszek | 2018-03-07 | 1 | -2/+4 |
| * | [Hexagon] Split HVX vector pair loads/stores, expand unaligned loads | Krzysztof Parzyszek | 2018-02-14 | 1 | -0/+5 |
| * | [Hexagon] Extract HVX lowering and selection into HVX-specific files, NFC | Krzysztof Parzyszek | 2018-02-06 | 1 | -0/+7 |
| * | [Hexagon] Split HVX operations on vector pairs | Krzysztof Parzyszek | 2018-02-06 | 1 | -0/+6 |
| * | [Hexagon] Add helper functions to identify single/pair vector types, NFC | Krzysztof Parzyszek | 2018-02-06 | 1 | -0/+2 |
| * | [Hexagon] Handle lowering of SETCC via setCondCodeAction | Krzysztof Parzyszek | 2018-02-06 | 1 | -0/+2 |
| * | [Hexagon] Rename HexagonISelLowering::getNode to getInstr, NFC | Krzysztof Parzyszek | 2018-01-31 | 1 | -2/+2 |
| * | [Hexagon] Implement HVX codegen for vector shifts | Krzysztof Parzyszek | 2018-01-31 | 1 | -0/+1 |
| * | [Hexagon] Remove unused HexagonISD opcodes, NFC | Krzysztof Parzyszek | 2018-01-24 | 1 | -3/+0 |
| * | [Hexagon] Implement basic vector operations on vectors vNi1 | Krzysztof Parzyszek | 2018-01-23 | 1 | -6/+48 |
| * | [Hexagon] Implement signed and unsigned multiply-high for vectors | Krzysztof Parzyszek | 2018-01-15 | 1 | -0/+1 |
| * | [Hexagon] Replace INSERTRP/EXTRACTRP with INSERT/EXTRACT in HexagonISD | Krzysztof Parzyszek | 2018-01-04 | 1 | -2/+0 |
| * | [Hexagon] Allow construction of HVX vector predicates | Krzysztof Parzyszek | 2017-12-20 | 1 | -0/+12 |
| * | [Hexagon] Generate HVX code for vector sign-, zero- and any-extends | Krzysztof Parzyszek | 2017-12-18 | 1 | -0/+1 |
| * | [Hexagon] Prefer to widen HVX vectors instead of promoting | Krzysztof Parzyszek | 2017-12-18 | 1 | -0/+2 |
| * | TLI: Allow using PSV for intrinsic mem operands | Matt Arsenault | 2017-12-14 | 1 | -0/+1 |
| * | [Hexagon] Generate HVX code for comparisons and selects | Krzysztof Parzyszek | 2017-12-14 | 1 | -0/+1 |
| * | [Hexagon] Add support for Hexagon V65 | Krzysztof Parzyszek | 2017-12-11 | 1 | -0/+3 |
| * | [Hexagon] Generate HVX code for basic arithmetic operations | Krzysztof Parzyszek | 2017-12-07 | 1 | -25/+26 |
| * | [Hexagon] Generate HVX code for vector construction and access | Krzysztof Parzyszek | 2017-12-06 | 1 | -2/+55 |
| * | [Hexagon] Remove HexagonISD::PACKHL | Krzysztof Parzyszek | 2017-11-29 | 1 | -1/+0 |
| * | [Hexagon] Create helpers extractVector and insertVector in lowering | Krzysztof Parzyszek | 2017-11-29 | 1 | -4/+21 |
| * | [Hexagon] Implement buildVector32 and buildVector64 as utility functions | Krzysztof Parzyszek | 2017-11-22 | 1 | -0/+5 |
| * | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie | 2017-11-17 | 1 | -1/+1 |
