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* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-1/+1
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling2008-09-261-1/+1
| | | | | | | | | | | | | | | | | llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... llvm-svn: 56703
* Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng2008-09-261-1/+1
| | | | | | disabled when frame address is desired. Also add support for depth > 0. llvm-svn: 56683
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-071-4/+4
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-311-9/+0
| | | | llvm-svn: 48995
* Rename PrintableName to Name.Bill Wendling2008-02-261-1/+1
| | | | llvm-svn: 47629
* Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling2008-02-261-1/+1
| | | | | | would have been a Godsend here! llvm-svn: 47625
* Fix code styleAnton Korobeynikov2008-02-201-17/+15
| | | | llvm-svn: 47370
* Remove bunch of gcc 4.3-related warnings from TargetAnton Korobeynikov2008-02-201-2/+2
| | | | llvm-svn: 47369
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+1
| | | | llvm-svn: 46930
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-37/+0
| | | | | | Some day I'll get it all moved over... llvm-svn: 45672
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-95/+0
| | | | llvm-svn: 45484
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-24/+0
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-1/+1
| | | | | | | | | | | | e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵Chris Lattner2007-12-301-1/+1
| | | | | | Likewise setImmedValue -> setImm llvm-svn: 45453
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-6/+7
| | | | | | the stored register is killed. llvm-svn: 44600
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-021-2/+4
| | | | llvm-svn: 44517
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+1
| | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-0/+5
| | | | | | | | This makes DwarfRegNum to accept list of numbers instead. Added three different "flavours", but only slightly tested on x86-32/linux. Please check another subtargets if possible, llvm-svn: 43997
* - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but ↵Evan Cheng2007-10-181-2/+2
| | | | | | | | only returns the opcode of the instruction post unfolding. - Fix some copy+paste bugs. llvm-svn: 43153
* Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister ↵Evan Cheng2007-10-181-4/+4
| | | | | | public interface. llvm-svn: 43150
* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-051-0/+50
| | | | | | | | address (not just from / to frameindexes). - Added target hooks to unfold load / store instructions / SDNodes into separate load, data processing, store instructions / SDNodes. llvm-svn: 42621
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-4/+10
| | | | | | Tested with "make check"! llvm-svn: 42346
* Long live the exception handling!Anton Korobeynikov2007-07-141-2/+3
| | | | | | | | | | | | | | | This patch fills the last necessary bits to enable exceptions handling in LLVM. Currently only on x86-32/linux. In fact, this patch adds necessary intrinsics (and their lowering) which represent really weird target-specific gcc builtins used inside unwinder. After corresponding llvm-gcc patch will land (easy) exceptions should be more or less workable. However, exceptions handling support should not be thought as 'finished': I expect many small and not so small glitches everywhere. llvm-svn: 39855
* eliminateFrameIndex() change.Evan Cheng2007-05-011-1/+3
| | | | llvm-svn: 36626
* Removed tabs everywhere except autogenerated & external files. Add makeAnton Korobeynikov2007-04-161-10/+10
| | | | | | target for tabs checking. llvm-svn: 36146
* Added MRegisterInfo hook to re-materialize an instruction.Evan Cheng2007-03-201-0/+9
| | | | llvm-svn: 35205
* PEI now passes a RegScavenger ptr to eliminateFrameIndex.Evan Cheng2007-02-281-2/+2
| | | | llvm-svn: 34707
* By default, spills kills the register being stored.Evan Cheng2007-02-231-3/+6
| | | | llvm-svn: 34515
* Support to provide exception and selector registers.Jim Laskey2007-02-211-0/+10
| | | | llvm-svn: 34482
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-0/+9
| | | | llvm-svn: 34428
* For PR1207:Reid Spencer2007-02-191-9/+0
| | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
* Added getReservedRegs().Evan Cheng2007-02-171-0/+9
| | | | llvm-svn: 34376
* PEI is now responsible for adding MaxCallFrameSize to frame size and align ↵Evan Cheng2007-01-231-10/+0
| | | | | | the stack. Each target can further adjust the frame size if necessary. llvm-svn: 33460
* hasFP() is now a virtual method of MRegisterInfo.Evan Cheng2007-01-231-1/+1
| | | | llvm-svn: 33455
* Fix naming inconsistency.Evan Cheng2007-01-021-6/+6
| | | | llvm-svn: 32823
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-17/+16
| | | | llvm-svn: 32333
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-27/+28
| | | | | | of opcode and number of operands. llvm-svn: 31947
* Properly transfer kill / dead info.Evan Cheng2006-11-151-2/+5
| | | | llvm-svn: 31765
* Matches MachineInstr changes.Evan Cheng2006-11-131-7/+8
| | | | llvm-svn: 31712
* silence warnings.Chris Lattner2006-11-031-6/+0
| | | | llvm-svn: 31394
* more shotenningAndrew Lenharth2006-10-311-6/+6
| | | | llvm-svn: 31331
* Completely eliminate def&use operands. Now a register operand is EITHER aChris Lattner2006-09-051-16/+28
| | | | | | def operand or a use operand. llvm-svn: 30109
* Constify some methods. Patch provided by Anton Vayvod, thanks!Chris Lattner2006-08-171-1/+1
| | | | llvm-svn: 29756
* Let the alpha breakage begin. First Formals and RET. next CallsAndrew Lenharth2006-06-121-1/+1
| | | | llvm-svn: 28753
* getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.Evan Cheng2006-05-181-0/+27
| | | | llvm-svn: 28378
* Fix call_adj.llAndrew Lenharth2006-05-171-1/+1
| | | | llvm-svn: 28360
* Move some methods out of MachineInstr into MachineOperandChris Lattner2006-05-041-5/+4
| | | | llvm-svn: 28102
* There shalt be only one "immediate" operand type!Chris Lattner2006-05-041-2/+2
| | | | llvm-svn: 28099
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