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author | Dan Gohman <gohman@apple.com> | 2008-07-07 23:14:23 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-07-07 23:14:23 +0000 |
commit | 3b46030375b309ac6e198664bbbf859884318084 (patch) | |
tree | 384b02de07f0f190d5753652f676f6c9a9a7d00c /llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp | |
parent | 7f8b6d5f8034a78638f9e82e42b6e647bed7106e (diff) | |
download | bcm5719-llvm-3b46030375b309ac6e198664bbbf859884318084.tar.gz bcm5719-llvm-3b46030375b309ac6e198664bbbf859884318084.zip |
Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.
This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.
llvm-svn: 53212
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp b/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp index e0859b5f1ac..dd8460a0656 100644 --- a/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -103,7 +103,7 @@ BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction &MF) const { // if frame pointer elimination is disabled. // bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const { - MachineFrameInfo *MFI = MF.getFrameInfo(); + const MachineFrameInfo *MFI = MF.getFrameInfo(); return MFI->hasVarSizedObjects(); } @@ -125,11 +125,11 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineInstr *New; if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) { - New=BuildMI(TII.get(Alpha::LDA), Alpha::R30) + New=BuildMI(MF, TII.get(Alpha::LDA), Alpha::R30) .addImm(-Amount).addReg(Alpha::R30); } else { assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP); - New=BuildMI(TII.get(Alpha::LDA), Alpha::R30) + New=BuildMI(MF, TII.get(Alpha::LDA), Alpha::R30) .addImm(Amount).addReg(Alpha::R30); } @@ -188,7 +188,7 @@ void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, MI.getOperand(i + 1).ChangeToRegister(Alpha::R28, false); MI.getOperand(i).ChangeToImmediate(getLower16(Offset)); //insert the new - MachineInstr* nMI=BuildMI(TII.get(Alpha::LDAH), Alpha::R28) + MachineInstr* nMI=BuildMI(MF, TII.get(Alpha::LDAH), Alpha::R28) .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30); MBB.insert(II, nMI); } else { |