summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2006-05-04 17:21:20 +0000
committerChris Lattner <sabre@nondot.org>2006-05-04 17:21:20 +0000
commitfef7a2d0f580e8c41e822dd6a200db3a862bb3ae (patch)
tree8508cb39aa55db7b0f4c1acc03bd4037a1983b02 /llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
parent15c52bda1d13344581ae684e2b02c7dbe4f32979 (diff)
downloadbcm5719-llvm-fef7a2d0f580e8c41e822dd6a200db3a862bb3ae.tar.gz
bcm5719-llvm-fef7a2d0f580e8c41e822dd6a200db3a862bb3ae.zip
There shalt be only one "immediate" operand type!
llvm-svn: 28099
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp b/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
index 85c9da8e642..95f60ed2e60 100644
--- a/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -234,14 +234,14 @@ AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
//inst off the SP/FP
//fix up the old:
MI.SetMachineOperandReg(i + 1, Alpha::R28);
- MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
+ MI.SetMachineOperandConst(i, MachineOperand::MO_Immediate,
getLower16(Offset));
//insert the new
MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
.addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
MBB.insert(II, nMI);
} else {
- MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
+ MI.SetMachineOperandConst(i, MachineOperand::MO_Immediate, Offset);
}
}
OpenPOWER on IntegriCloud