bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
*	In preparation for moving ARM's TargetRegisterInfo to the TargetMachine	Eric Christopher	2015-03-12	1	-38/+0
*	Remove the need to cache the subtarget in the ARM TargetRegisterInfo	Eric Christopher	2015-03-12	1	-1/+1
*	Canonicalize header guards into a common format.	Benjamin Kramer	2014-08-13	1	-3/+3
*	Prune includes in ARM target.	Craig Topper	2014-03-22	1	-2/+0
*	[C++11] Add 'override' keyword to virtual methods that override their base cl...	Craig Topper	2014-03-10	1	-7/+5
*	Don't cache the instruction and register info from the TargetMachine, because	Bill Wendling	2013-06-07	1	-3/+3
*	Reorder includes to match coding standards. Fix an issue or two exposed by that.	Craig Topper	2012-03-17	1	-2/+1
*	Implement frame unwinding information emission for Thumb1. Not finished yet b...	Anton Korobeynikov	2011-03-05	1	-1/+2
*	80-column cleanup of file header comments	Jim Grosbach	2009-11-07	1	-2/+3
*	Cleanup now that frame index scavenging via post-pass is working for ARM and ...	Jim Grosbach	2009-10-28	1	-2/+0
*	- More refactoring. This gets rid of all of the getOpcode calls.	Evan Cheng	2009-07-28	1	-13/+0
*	Refactor. Get rid of a few more getOpcode() calls.	Evan Cheng	2009-07-26	1	-5/+13
*	Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio...	David Goodwin	2009-07-24	1	-6/+11
*	Let callers decide the sub-register index on the def operand of rematerialize...	Evan Cheng	2009-07-16	1	-1/+1
*	Use common code for both ARM and Thumb-2 instruction and register info.	David Goodwin	2009-07-08	1	-16/+0
*	Generalize opcode selection in ARMBaseRegisterInfo.	David Goodwin	2009-07-08	1	-1/+1
*	Push methods into base class in preparation for sharing.	David Goodwin	2009-07-08	1	-9/+8
*	Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins...	David Goodwin	2009-07-02	1	-0/+60