summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
Commit message (Expand)AuthorAgeFilesLines
* Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.Simon Pilgrim2019-06-211-1/+1
* [ARM] Add MVE 64-bit GPR <-> vector move instructions.Simon Tatham2019-06-211-0/+69
* [ARM] Add MVE vector instructions that take a scalar input.Simon Tatham2019-06-211-0/+29
* [ARM] Add a batch of similarly encoded MVE instructions.Simon Tatham2019-06-211-0/+27
* [ARM] Fix -Wimplicit-fallthrough after D62675Fangrui Song2019-06-211-0/+2
* [ARM] Add MVE vector compare instructions.Simon Tatham2019-06-211-0/+43
* [ARM] Add a batch of MVE floating-point instructions.Simon Tatham2019-06-211-0/+49
* [ARM] Add a batch of MVE integer instructions.Simon Tatham2019-06-201-0/+31
* [llvm-objdump] Switch between ARM/Thumb based on mapping symbols.Eli Friedman2019-06-201-29/+28
* [ARM] Add MVE vector bit-operations (register inputs).Simon Tatham2019-06-191-0/+14
* [ARM] Rename MVE instructions in Tablegen for consistency.Simon Tatham2019-06-181-6/+6
* [ARM] Set up infrastructure for MVE vector instructions.Simon Tatham2019-06-131-26/+265
* [ARM] Refactor handling of IT mask operands.Simon Tatham2019-06-131-9/+16
* [ARM] First MVE instructions: scalar shifts.Mikhail Maltsev2019-06-111-0/+118
* [ARM] Add the non-MVE instructions in Arm v8.1-M.Simon Tatham2019-06-111-15/+351
* Revert CMake: Make most target symbols hidden by defaultTom Stellard2019-06-111-1/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2019-06-101-1/+1
* Revert rL362953 and its followup rL362955.Simon Tatham2019-06-101-351/+15
* [ARM] Add the non-MVE instructions in Arm v8.1-M.Simon Tatham2019-06-101-15/+351
* [ARM] Replace fp-only-sp and d16 with fp64 and d32.Simon Tatham2019-05-281-2/+2
* [ARM] Create a TargetInfo header. NFCRichard Trieu2019-05-141-0/+1
* ARM: disallow add/sub to sp unless Rn is also sp.Tim Northover2019-04-231-1/+13
* [ARM][FIX] Fix vfmal.f16 and vfmsl.f16 operandDiogo N. Sampaio2019-03-081-0/+9
* [ARM] Make fullfp16 instructions not conditionalisable.Simon Tatham2019-02-251-4/+12
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Remove trailing spaceFangrui Song2018-07-301-5/+5
* ARM: correctly decode VFP instructions following unpredictable t2ITTim Northover2018-06-261-0/+2
* ARM: diagnose unpredictable IT instructionsTim Northover2018-06-261-1/+4
* [ARM]Decoding MSR with unpredictable destination register causes an assertSimi Pallipurath2018-03-061-2/+3
* [ARM] Re-commit r324600 with fixed LLVMBuild.txtOliver Stannard2018-02-081-9/+2
* Revert r324600 as it breaks a buildbotOliver Stannard2018-02-081-2/+9
* [ARM] Fix disassembly of invalid banked register movesOliver Stannard2018-02-081-9/+2
* [ARM] Armv8.2-A FP16 code generation (part 1/3)Sjoerd Meijer2018-01-261-0/+7
* Silence a bunch of implicit fallthrough warningsAdrian Prantl2017-12-191-0/+4
* [ARM] Fix disassembly for conditional VMRS and VMSR instructions in ARM modeAndre Vieira2017-10-181-2/+8
* [ARM] v8.3-a complex number supportSam Parker2017-09-291-0/+37
* [ARM] Fix assembly and disassembly for VMRS/VMSRAndre Vieira2017-09-221-0/+24
* [ARM] Fix some Clang-tidy modernize-use-using and Include What You Use warnin...Eugene Zelenko2017-09-201-5/+4
* [ARM] Assembler support for the ARMv8.2a dot product instructionsSjoerd Meijer2017-08-111-0/+15
* Revert "[ARM] Fix assembly and disassembly for VMRS/VMSR"Tim Northover2017-08-081-24/+0
* [ARM] Fix assembly and disassembly for VMRS/VMSRAndre Vieira2017-08-071-0/+24
* [llvm-objdump] Handle invalid instruction gracefully on ARMEugene Leviant2017-06-291-1/+1
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* ARMDisassembler: loop over ARM decode tablesSjoerd Meijer2017-03-131-57/+20
* [ARM] Fix some Clang-tidy modernize and Include What You Use warnings; other ...Eugene Zelenko2017-01-271-33/+29
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-091-4/+4
* Replace a few more "fall through" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-171-3/+3
* [ARM] Add support for mrrc/mrrc2 intrinsics.Ranjeet Singh2016-06-171-8/+26
* Reverting r272778 because there's an assertionRanjeet Singh2016-06-151-26/+8
* [ARM] Add support for mrrc/mrrc2 intrinsics.Ranjeet Singh2016-06-151-8/+26
OpenPOWER on IntegriCloud