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| author | Diogo N. Sampaio <diogo.sampaio@arm.com> | 2019-03-08 17:11:20 +0000 |
|---|---|---|
| committer | Diogo N. Sampaio <diogo.sampaio@arm.com> | 2019-03-08 17:11:20 +0000 |
| commit | c20c37ba7f546e0898e09953f03ca2c28ddc7035 (patch) | |
| tree | d5a1dde3c2e00799460167457e57d5212ae8c280 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 7f3c16c0f3178efd2883ceac441aa162728f1726 (diff) | |
| download | bcm5719-llvm-c20c37ba7f546e0898e09953f03ca2c28ddc7035.tar.gz bcm5719-llvm-c20c37ba7f546e0898e09953f03ca2c28ddc7035.zip | |
[ARM][FIX] Fix vfmal.f16 and vfmsl.f16 operand
The indexed variant of vfmal.f16 and vfmsl.f16
instructions use the uppser bits of the indexed
operand to store the index (1 bit for the double
variant, 2 bits for the quad).
This limits the usable registers to d0 - d7 or
s0 - s15. This patch enforces this limitation.
Differential Revision: https://reviews.llvm.org/D59021
llvm-svn: 355707
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index b65a0753de0..e92bcc5ba51 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -165,6 +165,8 @@ static DecodeStatus DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, const void *Decoder); static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, @@ -1045,6 +1047,13 @@ static DecodeStatus DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, return DecodeDPRRegisterClass(Inst, RegNo, Address, Decoder); } +static DecodeStatus DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, const void *Decoder) { + if (RegNo > 15) + return MCDisassembler::Fail; + return DecodeSPRRegisterClass(Inst, RegNo, Address, Decoder); +} + static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) { |
