diff options
author | Adrian Prantl <aprantl@apple.com> | 2017-12-19 22:05:25 +0000 |
---|---|---|
committer | Adrian Prantl <aprantl@apple.com> | 2017-12-19 22:05:25 +0000 |
commit | 0e6694d111b6d3c0438f2b72fab6d10b7b4eab6c (patch) | |
tree | 1f121135fb5c07575653076be40e123c9d247244 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
parent | f81727d138b3b216c4db06ab8b01d67de6580525 (diff) | |
download | bcm5719-llvm-0e6694d111b6d3c0438f2b72fab6d10b7b4eab6c.tar.gz bcm5719-llvm-0e6694d111b6d3c0438f2b72fab6d10b7b4eab6c.zip |
Silence a bunch of implicit fallthrough warnings
llvm-svn: 321114
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index a29a2eeccfe..53c63587767 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -2386,6 +2386,7 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, case ARM::VLD4q32_UPD: if (!Check(S, DecodeDPRRegisterClass(Inst, (Rd+2)%32, Address, Decoder))) return MCDisassembler::Fail; + break; default: break; } @@ -3326,6 +3327,7 @@ static DecodeStatus DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, case ARM::t2STRs: if (Rn == 15) return MCDisassembler::Fail; + break; default: break; } @@ -3391,6 +3393,7 @@ static DecodeStatus DecodeT2LoadShift(MCInst &Inst, unsigned Insn, break; case ARM::t2LDRSBs: Inst.setOpcode(ARM::t2PLIs); + break; default: break; } @@ -3854,6 +3857,7 @@ static DecodeStatus DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, case ARM::t2STRHi12: if (Rn == 15) return MCDisassembler::Fail; + break; default: break; } |