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path: root/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
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* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* [ARM] Fix issue with large xor constants.David Green2018-02-221-5/+2
* [NFC] fix trivial typos in commentsHiroshi Inoue2018-02-221-1/+1
* [ARM] Mark -1 as cheap in xor's for thumb1David Green2018-02-201-0/+7
* [Inliner] Restrict soft-float inlining penalty.Eli Friedman2017-12-221-19/+0
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* [ARM] Allow unrolling of multi-block loops.Sam Parker2017-10-231-16/+35
* [ARM] Fix some Clang-tidy modernize-use-using and Include What You Use warnin...Eugene Zelenko2017-09-201-7/+24
* [ARM] Improve loop unrolling for Cortex-MSam Parker2017-08-161-6/+19
* [ARM] Enable partial and runtime unrollingSam Parker2017-07-251-0/+32
* [ARM] Inline callee if its target-features are a subset of the callerFlorian Hahn2017-07-131-0/+18
* [SystemZ] TargetTransformInfo cost functions implemented.Jonas Paulsson2017-04-121-4/+6
* [ARM/AArch64] Ensure valid vector element types for interleaved accessesMatthew Simpson2017-04-101-5/+4
* [ARM/AArch64] Update costs for interleaved accesses with wide typesMatthew Simpson2017-03-021-2/+4
* [ARM] Make f16 interleaved accesses expensive.Ahmed Bougacha2017-02-111-1/+2
* [X86] updating TTI costs for arithmetic instructions on X86\SLM arch.Mohammed Agabaria2017-01-111-1/+2
* Currently isLikelyComplexAddressComputation tries to figure out if the given ...Mohammed Agabaria2017-01-051-2/+5
* [ARM] ADD with a negative offset can become SUB for freeJames Molloy2016-09-091-0/+4
* [ARM] icmp %x, -C can be lowered to a simple ADDS or CMNJames Molloy2016-09-091-0/+11
* [Thumb1] AND with a constant operand can be converted into BICJames Molloy2016-09-081-0/+4
* [Thumb1] Fix cost calculation for complemented immediatesJames Molloy2016-09-081-1/+1
* This implements a more optimal algorithm for selecting a base constant inSjoerd Meijer2016-07-141-0/+11
* [ARM] Do not test for CPUs, use SubtargetFeatures (Part 3). NFCIDiana Picus2016-07-061-4/+2
* [ARM] Fix 28282: cost computation for constant hoistingWeiming Zhao2016-06-281-1/+1
* ARM: don't try to hoist constant RHS out of a division.Tim Northover2016-04-151-0/+15
* ARM: override cost function to re-enable ConstantHoisting (& fix it).Tim Northover2016-04-131-5/+5
* [AArch64][ARM] Don't base interleaved op legality on type alloc size.Ahmed Bougacha2015-12-091-2/+2
* [ARM] Don't pessimize i32 vselect.Charlie Turner2015-11-171-3/+0
* Remove templates from CostTableLookup functions. All instantiations had the s...Craig Topper2015-10-281-14/+9
* Convert cost table lookup functions to return a pointer to the entry or nullp...Craig Topper2015-10-271-39/+32
* [CostModel][ARM] Increase cost of insert/extract operationsSilviu Baranga2015-08-171-5/+12
* [TTI] Make the cost APIs in TargetTransformInfo consistently use 'int'Chandler Carruth2015-08-051-27/+25
* [ARM/AArch64] Fix cost model for interleaved accessesSilviu Baranga2015-07-271-1/+1
* Make TargetLowering::getPointerTy() taking DataLayout as an argumentMehdi Amini2015-07-091-10/+10
* Make TargetTransformInfo keeping a reference to the Module DataLayoutMehdi Amini2015-07-091-2/+2
* [ARM] Lower interleaved memory accesses to vldN/vstN intrinsics.Hao Liu2015-06-261-0/+25
* Value soft float calls as more expensive in the inliner.Cameron Esfahani2015-02-051-0/+19
* [PM] Switch the TargetMachine interface from accepting a pass managerChandler Carruth2015-01-311-121/+2
* [PM] Change the core design of the TTI analysis to use a polymorphicChandler Carruth2015-01-311-90/+75
* [ARM] Teach the cost model that cross-class copies are costly.James Molloy2014-09-121-0/+7
* Rename getMaximumUnrollFactor -> getMaxInterleaveFactor; also rename option n...Sanjay Patel2014-09-101-1/+1
* Allow vectorization of division by uniform power of 2.Karthik Bhat2014-08-251-9/+11
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-1/+1
* Add Support to Recognize and Vectorize NON SIMD instructions in SLPVectorizer.Karthik Bhat2014-06-201-20/+47
* Fix typo.Eric Christopher2014-05-221-1/+1
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-1/+1
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
* [TTI] There is actually no realistic way to pop TTI implementations offChandler Carruth2014-03-101-4/+0
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-101-17/+20
* Change else if => if after return, after r203265Duncan P. N. Exon Smith2014-03-081-8/+9
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