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path: root/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
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* [ARM][MVE] Don't unroll intrinsic loops.Sam Parker2020-01-091-4/+5
* [ARM][MVE] Enable masked gathers from vector of pointersAnna Welker2020-01-081-0/+24
* Rename TTI::getIntImmCost for instructions and intrinsicsReid Kleckner2019-12-111-1/+1
* [ARM] Enable MVE masked loads and storesDavid Green2019-12-091-1/+1
* [ARM] Teach the Arm cost model that a Shift can be folded into other instruct...David Green2019-12-091-5/+34
* [ARM] Additional tests and minor formatting. NFCDavid Green2019-12-091-43/+43
* [ARM] MVE interleaving load and stores.David Green2019-11-191-9/+16
* [ARM][MVE] tail-predicationSjoerd Meijer2019-11-151-0/+3
* [ARM][MVE] canTailPredicateLoopSjoerd Meijer2019-11-131-8/+99
* [TTI][LV] preferPredicateOverEpilogueSjoerd Meijer2019-11-061-0/+44
* [Alignment][NFC] getMemoryOpCost uses MaybeAlignGuillaume Chatelet2019-10-251-3/+5
* [DAGCombine][ARM] Enable extending masked loadsSam Parker2019-10-171-6/+11
* [NFC][TTI] Add Alignment for isLegalMasked[Load/Store]Sam Parker2019-10-141-1/+1
* [ARM] Masked loads and storesDavid Green2019-09-151-0/+20
* [ARM] Add support for MVE vmaxv and vminvSam Tebbs2019-09-131-2/+2
* [ARM] Add support for MVE vaddvSam Tebbs2019-08-191-0/+25
* [ARM] MVE sext costsDavid Green2019-08-191-0/+25
* [ARM] MVE sext of a load is freeDavid Green2019-08-161-0/+15
* [ARM] Add MVE beats vector cost modelDavid Green2019-08-131-21/+67
* [ARM] sext of a load is freeDavid Green2019-08-121-0/+21
* [ARM] MVE shuffle broadcast costsDavid Green2019-08-121-0/+17
* [ARM] Put some of the TTI costmodel behind hasNeon calls.David Green2019-08-121-74/+75
* [MVE] Don't try to unroll vectorised MVE loopsDavid Green2019-08-111-0/+5
* [ARM][LowOverheadLoops] Enable by defaultSam Parker2019-07-301-1/+1
* [ARM] WLS/LE Code GenerationSam Parker2019-07-011-0/+2
* [NFC] move some hardware loop checking code to a common place for other using.Chen Zheng2019-06-191-1/+1
* [CodeGen] Check for HardwareLoop Latch ExitBlockSam Parker2019-06-171-4/+0
* [NFC] Simplify Call querySam Parker2019-06-131-1/+1
* [ARM][TTI] Scan for existing loop intrinsicsSam Parker2019-06-131-5/+33
* [ARM] Implement TTI::isHardwareLoopProfitableSam Parker2019-06-121-0/+194
* [ARM] Enable Unroll UpperBoundDavid Green2019-06-101-0/+1
* [ARM] Implement TTI::getMemcpyCostSjoerd Meijer2019-04-301-0/+35
* [IR] Refactor attribute methods in Function class (NFC)Evandro Menezes2019-04-041-1/+1
* [ARM] Mark 255 and 65535 as cheap for Thumb1 "And"David Green2019-02-041-3/+7
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [LV] Support vectorization of interleave-groups that require an epilog underDorit Nuzman2018-10-311-3/+5
* [TTI] Add generic SK_Broadcast shuffle costsSimon Pilgrim2018-10-251-3/+22
* [TTI] Add generic cost handling of SK_Reverse shufflesSimon Pilgrim2018-10-231-0/+2
* recommit 344472 after fixing build failure on ARM and PPC.Dorit Nuzman2018-10-141-3/+5
* revert 344472 due to failures.Dorit Nuzman2018-10-141-5/+3
* [IAI,LV] Add support for vectorizing predicated strided accesses using maskedDorit Nuzman2018-10-141-3/+5
* [Thumb1] Any imm8 should have cost of 1Zhaoshi Zheng2018-09-241-2/+2
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* [UnrollAndJam] New Unroll and Jam passDavid Green2018-07-011-0/+2
* [CostModel] Replace ShuffleKind::SK_Alternate with ShuffleKind::SK_Select (PR...Simon Pilgrim2018-06-121-6/+6
* Revert 333358 as it's failing on some builders.David Green2018-05-271-2/+0
* [UnrollAndJam] Add a new Unroll and Jam passDavid Green2018-05-271-0/+2
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-4/+4
* [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code...Craig Topper2018-03-291-1/+1
* Fix layering by moving ValueTypes.h from CodeGen to IRDavid Blaikie2018-03-231-1/+1
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