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authorDiana Picus <diana.picus@linaro.org>2016-07-06 09:22:23 +0000
committerDiana Picus <diana.picus@linaro.org>2016-07-06 09:22:23 +0000
commit4879b050cccc33a91bbda4203961e7365ad19cf9 (patch)
treecfc7d710d20a8d68d1987c4e4e376723a5b3d91e /llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
parent02ced295aa8213155517fa1e1c2d33f61d90bf6e (diff)
downloadbcm5719-llvm-4879b050cccc33a91bbda4203961e7365ad19cf9.tar.gz
bcm5719-llvm-4879b050cccc33a91bbda4203961e7365ad19cf9.zip
[ARM] Do not test for CPUs, use SubtargetFeatures (Part 3). NFCI
This is a follow-up for r273544 and r273853. The end goal is to get rid of the isSwift / isCortexXY / isWhatever methods. This commit also marks them as obsolete. Differential Revision: http://reviews.llvm.org/D21796 llvm-svn: 274616
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp6
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
index ddb5d287780..a673619b922 100644
--- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
@@ -259,10 +259,8 @@ int ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy,
unsigned Index) {
// Penalize inserting into an D-subregister. We end up with a three times
// lower estimated throughput on swift.
- if (ST->isSwift() &&
- Opcode == Instruction::InsertElement &&
- ValTy->isVectorTy() &&
- ValTy->getScalarSizeInBits() <= 32)
+ if (ST->hasSlowLoadDSubregister() && Opcode == Instruction::InsertElement &&
+ ValTy->isVectorTy() && ValTy->getScalarSizeInBits() <= 32)
return 3;
if ((Opcode == Instruction::InsertElement ||
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