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path: root/llvm/lib/Target/ARM/ARMISelLowering.cpp
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* Don't reserve the R0 and R1 registers here. We don't use these registers, andBill Wendling2012-02-131-4/+9
* Make valgrind happy.Jason W Kim2012-02-101-2/+2
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-10/+7
* Cleanups for EABI standard functionsAnton Korobeynikov2012-01-291-2/+7
* Use base AAPCS for varargs functions even for AAPCS-VFP CCAnton Korobeynikov2012-01-291-1/+3
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-6/+2
* Refactor variables unused under non-assert builds (& remove two entirely unus...David Blaikie2012-01-161-2/+2
* Return an ArrayRef from ShuffleVectorSDNode::getMask and push it through Code...Benjamin Kramer2012-01-151-20/+12
* Match SelectionDAG logic for enabling movt.Jakob Stoklund Olesen2012-01-071-1/+2
* Remove VectorExtras. This unused helper was written for a type of API that is...Benjamin Kramer2012-01-071-1/+0
* Add variants of the dispatchsetup pseudo for Thumb and !VFP. <rdar://10620138>Bob Wilson2011-12-221-1/+6
* Make check a bit more strict so we don't call ARM_AM::getFP32Imm with a value...Eli Friedman2011-12-151-1/+1
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-131-0/+4
* Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix f...Stepan Dyatkovskiy2011-12-111-0/+22
* Revert r146322 to appease buildbots. Original commit message:Chad Rosier2011-12-101-22/+0
* Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix f...Stepan Dyatkovskiy2011-12-101-0/+22
* Splats can contain undef's; make sure to handle them correctly. PR11526.Eli Friedman2011-12-091-2/+1
* Revert r146143, "Fix bug 9905: Failure in code selection for llvm intrinsicsDaniel Dunbar2011-12-081-22/+0
* Fix bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for...Stepan Dyatkovskiy2011-12-081-0/+22
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-071-4/+4
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-9/+14
* Move code into anonymous namespaces.Benjamin Kramer2011-11-261-1/+1
* Fix ARM SjLj-EH dispatch setup code. <rdar://problem/10444602>Bob Wilson2011-11-161-59/+2
* Remove some unnecessary includes of PseudoSourceValue.h.Jay Foad2011-11-151-1/+0
* Add vmov.f32 to materialize f32 immediate splats which cannot be handled byEvan Cheng2011-11-151-0/+11
* Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.Eli Friedman2011-11-111-0/+1
* Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.Eli Friedman2011-11-091-1/+25
* Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.Lang Hames2011-11-081-0/+7
* Added invariant field to the DAG.getLoad method and changed all calls.Pete Cooper2011-11-081-31/+36
* Make sure to mark vector extload's as expand on ARM. Fixes PR11319.Eli Friedman2011-11-081-9/+11
* Reapply r143206, with fixes. Disallow physical register lifetimesDan Gohman2011-11-031-3/+16
* Fixed parameter name.Lang Hames2011-11-021-2/+2
* Try to lower memset/memcpy/memmove to vector instructions on ARM where the al...Lang Hames2011-11-021-0/+28
* Revert r143206, as there are still some failing tests.Dan Gohman2011-10-291-16/+3
* Reapply r143177 and r143179 (reverting r143188), with schedulerDan Gohman2011-10-281-3/+16
* Speculatively disable Dan's commits 143177 and 143179 to see ifDuncan Sands2011-10-281-16/+3
* Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUWDan Gohman2011-10-281-3/+16
* Make sure short memsets on ARM lower to stores, even when optimizing for size.Lang Hames2011-10-261-0/+2
* Revert r142530 at least temporarily while a discussion is had on llvm-commits...James Molloy2011-10-261-5/+2
* Use a worklist to prevent the iterator from becoming invalidated because of t...Bill Wendling2011-10-261-3/+4
* Revert part of r142530. The patch potentially hurts performance especiallyEvan Cheng2011-10-261-3/+3
* Don't crash on variable insertelement on ARM. PR10258.Eli Friedman2011-10-241-0/+11
* Change this overloaded use of Sched::Latency to be an overloadedDan Gohman2011-10-241-2/+2
* The different flavors of ARM have different valid subsets of registers. CheckBill Wendling2011-10-221-3/+13
* Add missing operand. <rdar://problem/10313323>Bill Wendling2011-10-201-1/+2
* Use literal pool loads instead of MOVW/MOVT for materializing global addresse...James Molloy2011-10-191-3/+6
* Make sure we emit the 'movw' and 'movt' only if it's supported. Otherwise, us...Bill Wendling2011-10-191-5/+27
* Remove some dead code.Bill Wendling2011-10-191-6/+0
* Emit the MOVT instruction only if the # LPads is > 64K.Bill Wendling2011-10-181-10/+20
* For Thumb mode, we need to use a constant pool if the value is too large to beBill Wendling2011-10-181-3/+20
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