| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Add braces to if clause to make symmetric with associate else clause. | Chad Rosier | 2012-02-15 | 1 | -18/+19 |
| * | Strip the pointer casts from the constants here. | Bill Wendling | 2012-02-15 | 1 | -1/+1 |
| * | Use a temporary variable, rather then a series of redundant calls. | Chad Rosier | 2012-02-15 | 1 | -4/+5 |
| * | Remove unnecessary assignment to temporary, ResultReg. | Chad Rosier | 2012-02-14 | 1 | -8/+4 |
| * | Third time's the charm...? | Lang Hames | 2012-02-14 | 1 | -2/+2 |
| * | Unswap swap operands, partially reducing confusion. | Lang Hames | 2012-02-14 | 1 | -2/+2 |
| * | Don't reserve the R0 and R1 registers here. We don't use these registers, and | Bill Wendling | 2012-02-13 | 1 | -4/+9 |
| * | Make operands for VSWP read-modify-write. | Lang Hames | 2012-02-13 | 1 | -4/+6 |
| * | Make the EDis tables const. | Benjamin Kramer | 2012-02-11 | 1 | -4/+4 |
| * | Revert r150222, as the clang driver now handles this properly. | Jim Grosbach | 2012-02-10 | 1 | -11/+3 |
| * | Make valgrind happy. | Jason W Kim | 2012-02-10 | 1 | -2/+2 |
| * | ARM on darwin, v6 implies the presence of VFP for the assembler. | Jim Grosbach | 2012-02-10 | 1 | -3/+11 |
| * | Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE... | James Molloy | 2012-02-09 | 2 | -0/+9 |
| * | Codegen pass definition cleanup. No functionality. | Andrew Trick | 2012-02-08 | 1 | -2/+2 |
| * | [fast-isel] Add support for SUBs with non-legal types. | Chad Rosier | 2012-02-08 | 1 | -0/+5 |
| * | [fast-isel] Add support for ORs with non-legal types. | Chad Rosier | 2012-02-08 | 1 | -2/+13 |
| * | [fast-isel] Add support for indirect branches. | Chad Rosier | 2012-02-07 | 1 | -0/+13 |
| * | Do not fold ADD / SUB into load / store (to form pre-indexed, post-indexed | Evan Cheng | 2012-02-07 | 1 | -24/+58 |
| * | Convert assert(0) to llvm_unreachable | Craig Topper | 2012-02-07 | 16 | -73/+53 |
| * | [fast-isel] Add support for ADDs with non-legal types. | Chad Rosier | 2012-02-06 | 1 | -5/+34 |
| * | Enable streaming of bitcode | Derek Schuff | 2012-02-06 | 1 | -4/+4 |
| * | DefinesPredicate should only look for def operands. Patch by Ludwig Meier. | Evan Cheng | 2012-02-05 | 1 | -1/+1 |
| * | Persuade GCC that there is nothing worth warning about here (there isn't). | Duncan Sands | 2012-02-05 | 1 | -0/+1 |
| * | TargetPassConfig: confine the MC configuration to TargetMachine. | Andrew Trick | 2012-02-04 | 2 | -7/+5 |
| * | [fast-isel] Add support for URem. | Chad Rosier | 2012-02-03 | 1 | -8/+10 |
| * | [fast-isel] Rename isZExt to isSigned. No functional change intended. | Chad Rosier | 2012-02-03 | 1 | -13/+14 |
| * | [fast-isel] Add support for UDIV. | Chad Rosier | 2012-02-03 | 1 | -8/+10 |
| * | [fast-isel] Add support for FPToUI. Also add test cases for FPToSI. | Chad Rosier | 2012-02-03 | 1 | -6/+8 |
| * | [fast-isel] Add support for selecting UIToFP. | Chad Rosier | 2012-02-03 | 1 | -6/+8 |
| * | Added TargetPassConfig. The first little step toward configuring codegen passes. | Andrew Trick | 2012-02-03 | 2 | -23/+48 |
| * | Add pseudo-registers for pairs, triples, and quads of D registers. | Jakob Stoklund Olesen | 2012-02-02 | 1 | -15/+70 |
| * | Move ARM subreg index compositions to the SubRegIndex itself. | Jakob Stoklund Olesen | 2012-02-01 | 1 | -28/+22 |
| * | Tidy up. One more return type mismatch fix. | Jim Grosbach | 2012-01-31 | 1 | -1/+1 |
| * | Refactor loop for better readability. | Jim Grosbach | 2012-01-31 | 1 | -3/+2 |
| * | Add explanatory comment. | Jim Grosbach | 2012-01-31 | 1 | -0/+1 |
| * | Cleanups for EABI standard functions | Anton Korobeynikov | 2012-01-29 | 1 | -2/+7 |
| * | Use base AAPCS for varargs functions even for AAPCS-VFP CC | Anton Korobeynikov | 2012-01-29 | 1 | -1/+3 |
| * | Add a note about a potential optimization for clz/ctz patterns for ARM | Bob Wilson | 2012-01-28 | 1 | -0/+16 |
| * | Ensure .AliasedSymbol() is called on all uses of getSymbol(). Affects ARM and... | James Molloy | 2012-01-28 | 1 | -1/+1 |
| * | Better user diagnostics for more ARM MachO relocation errors. | Jim Grosbach | 2012-01-27 | 1 | -4/+8 |
| * | Keep source information, if available, around for ARM Fixups. | Jim Grosbach | 2012-01-26 | 3 | -9/+15 |
| * | Tidy up. Fix mismatched return types for error handling. | Jim Grosbach | 2012-01-26 | 1 | -8/+4 |
| * | Add support for the R_ARM_TARGET1 relocation, which should be given to reloca... | James Molloy | 2012-01-26 | 3 | -1/+21 |
| * | Properly emit ctors / dtors with priorities into desired sections | Anton Korobeynikov | 2012-01-25 | 2 | -2/+37 |
| * | ARM assemly parsing and validation of IT instruction. | Jim Grosbach | 2012-01-25 | 2 | -3/+14 |
| * | NEON VLD4(all lanes) assembly parsing and encoding. | Jim Grosbach | 2012-01-25 | 4 | -2/+215 |
| * | Tidy up. Rename VLD4DUP patterns for consistency. | Jim Grosbach | 2012-01-24 | 1 | -6/+6 |
| * | NEON VLD3(all lanes) assembly parsing and encoding. | Jim Grosbach | 2012-01-24 | 4 | -6/+212 |
| * | NEON VST4(one lane) assembly parsing and encoding. | Jim Grosbach | 2012-01-24 | 2 | -0/+148 |
| * | Widen the instruction encoder that TblGen emits to a 64 bits, which should ac... | Owen Anderson | 2012-01-24 | 2 | -2/+2 |
