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| author | Bob Wilson <bob.wilson@apple.com> | 2011-12-22 23:39:48 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2011-12-22 23:39:48 +0000 |
| commit | 1a74de95040808c0063fe3a73cd78ca5ba6c815c (patch) | |
| tree | fe4321d47c2f3a9e7dba205ddf1ed86cfa7fc872 /llvm/lib/Target/ARM/ARMISelLowering.cpp | |
| parent | 72be32af88cdaf2a22a4e5d631b53347bdefcd10 (diff) | |
| download | bcm5719-llvm-1a74de95040808c0063fe3a73cd78ca5ba6c815c.tar.gz bcm5719-llvm-1a74de95040808c0063fe3a73cd78ca5ba6c815c.zip | |
Add variants of the dispatchsetup pseudo for Thumb and !VFP. <rdar://10620138>
My change r146949 added register clobbers to the eh_sjlj_dispatchsetup pseudo
instruction, but on Thumb1 some of those registers cannot be used. This
caused massive failures on the testsuite when compiling for Thumb1. While
fixing that, I noticed that the eh_sjlj_setjmp instruction has a "nofp"
variant, and I realized that dispatchsetup needs the same thing, so I have
added that as well.
llvm-svn: 147204
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index c6c1f5be935..2482f4e27a8 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -5792,7 +5792,12 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const { MachineMemOperand::MOLoad | MachineMemOperand::MOVolatile, 4, 4); - BuildMI(DispatchBB, dl, TII->get(ARM::eh_sjlj_dispatchsetup)); + if (AFI->isThumb1OnlyFunction()) + BuildMI(DispatchBB, dl, TII->get(ARM::tInt_eh_sjlj_dispatchsetup)); + else if (!Subtarget->hasVFP2()) + BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup_nofp)); + else + BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup)); unsigned NumLPads = LPadList.size(); if (Subtarget->isThumb2()) { |
