| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Thumb unconditional branches are allowed in IT blocks, and therefore should h... | Owen Anderson | 2011-09-09 | 1 | -2/+4 |
| * | Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH. | Jim Grosbach | 2011-09-09 | 1 | -9/+24 |
| * | Add codegen support for vector select (in the IR this means a select | Duncan Sands | 2011-09-06 | 1 | -5/+12 |
| * | Fix fall outs from my recent change on how carry bit is modeled during isel. | Evan Cheng | 2011-09-06 | 1 | -1/+1 |
| * | Null-initialize to shut up -Wuninitialized warnings. | Eli Friedman | 2011-09-01 | 1 | -1/+1 |
| * | 64-bit atomic cmpxchg for ARM. | Eli Friedman | 2011-08-31 | 1 | -27/+74 |
| * | Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next. | Eli Friedman | 2011-08-31 | 1 | -0/+179 |
| * | Follow up to r138791. | Evan Cheng | 2011-08-30 | 1 | -0/+23 |
| * | Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical | Evan Cheng | 2011-08-30 | 1 | -73/+38 |
| * | Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enoug... | Eli Friedman | 2011-08-29 | 1 | -0/+1 |
| * | Silence GCC warnings and make an array const. | Benjamin Kramer | 2011-08-27 | 1 | -3/+3 |
| * | Atomic load/store on ARM/Thumb. | Eli Friedman | 2011-08-26 | 1 | -0/+2 |
| * | ARM expansion of pre-indexed store pseudos should maintain memoperands. | Jim Grosbach | 2011-08-12 | 1 | -1/+3 |
| * | Silence a bunch (but not all) "variable written but not read" warnings | Duncan Sands | 2011-08-12 | 1 | -2/+2 |
| * | ARM STRH assembly parsing and encoding. | Jim Grosbach | 2011-08-11 | 1 | -3/+9 |
| * | ARM fix typo in pre-indexed store lowering. | Jim Grosbach | 2011-08-09 | 1 | -1/+1 |
| * | ARM refactor indexed store instructions. | Jim Grosbach | 2011-08-05 | 1 | -0/+31 |
| * | New approach to r136737: insert the necessary fences for atomic ops in platfo... | Eli Friedman | 2011-08-03 | 1 | -78/+9 |
| * | ARM backend support for atomicrmw and cmpxchg with non-monotonic ordering. N... | Eli Friedman | 2011-08-02 | 1 | -47/+77 |
| * | Add support for the 'Q' constraint. | Eric Christopher | 2011-07-29 | 1 | -0/+3 |
| * | Code generation for 'fence' instruction. | Eli Friedman | 2011-07-27 | 1 | -0/+30 |
| * | ARM extend instructions simplification. | Jim Grosbach | 2011-07-27 | 1 | -3/+5 |
| * | Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi... | Owen Anderson | 2011-07-21 | 1 | -4/+8 |
| * | Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate A... | Evan Cheng | 2011-07-20 | 1 | -2/+3 |
| * | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner | 2011-07-18 | 1 | -6/+6 |
| * | Improve codegen for select's: | Evan Cheng | 2011-07-13 | 1 | -1/+66 |
| * | Add an intrinsic and codegen support for fused multiply-accumulate. The intent | Cameron Zwarich | 2011-07-08 | 1 | -0/+3 |
| * | Add more info to FIXME. | Jim Grosbach | 2011-07-08 | 1 | -1/+5 |
| * | ARMv7M vs. ARMv7E-M support. | Jim Grosbach | 2011-07-01 | 1 | -1/+2 |
| * | Add support for the 'j' immediate constraint. This is conditionalized on | Eric Christopher | 2011-07-01 | 1 | -0/+9 |
| * | Add support for the ARM 't' register constraint. And another testcase | Eric Christopher | 2011-07-01 | 1 | -0/+5 |
| * | We'll return a null RC by default if we can't match. | Eric Christopher | 2011-07-01 | 1 | -2/+1 |
| * | Add support for the 'x' constraint. | Eric Christopher | 2011-07-01 | 1 | -0/+9 |
| * | Capitalize the unsigned part of the initializer. | Eric Christopher | 2011-06-30 | 1 | -1/+1 |
| * | Rename Pair to RCPair lacking any better naming ideas. | Eric Christopher | 2011-06-30 | 1 | -10/+10 |
| * | Add support for the 'h' constraint. | Eric Christopher | 2011-06-30 | 1 | -1/+7 |
| * | Add a convenience typedef for std::pair<unsigned, const TargetRegisterClass*>. | Eric Christopher | 2011-06-30 | 1 | -7/+8 |
| * | Remove getRegClassForInlineAsmConstraint from the ARM port. | Eric Christopher | 2011-06-29 | 1 | -56/+15 |
| * | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng | 2011-06-28 | 1 | -3/+3 |
| * | Remove warning: 'c0' may be used uninitialized in this function. | Chad Rosier | 2011-06-28 | 1 | -1/+2 |
| * | The Neon VCVT (between floating-point and fixed-point, Advanced SIMD) | Chad Rosier | 2011-06-24 | 1 | -1/+104 |
| * | Handle the memory-ness of all U+ ARM constraints. | Eric Christopher | 2011-06-21 | 1 | -3/+6 |
| * | Remove unused but set variables. | Benjamin Kramer | 2011-06-18 | 1 | -1/+0 |
| * | Mark ldrexd/strexd w/ volatile memory by default | Bruno Cardoso Lopes | 2011-06-16 | 1 | -2/+2 |
| * | Revision r128665 added an optimization to make use of NEON multiplier | Chad Rosier | 2011-06-16 | 1 | -1/+1 |
| * | A minor simplification: no functional change. | Bob Wilson | 2011-06-15 | 1 | -7/+4 |
| * | PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff | Evan Cheng | 2011-06-15 | 1 | -4/+7 |
| * | Add an optimization that looks for a specific pair-wise add pattern and gener... | Tanya Lattner | 2011-06-14 | 1 | -5/+106 |
| * | Add one more argument to the prefetch intrinsic to indicate whether it's a data | Bruno Cardoso Lopes | 2011-06-14 | 1 | -3/+4 |
| * | Provide an ARMCCState subclass of CCState so that ARM clients will always set | Cameron Zwarich | 2011-06-10 | 1 | -17/+29 |
