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authorEric Christopher <echristo@apple.com>2011-06-30 23:23:01 +0000
committerEric Christopher <echristo@apple.com>2011-06-30 23:23:01 +0000
commitf45daac30ff6265697ed43ba34b4dc66ca1e7e80 (patch)
tree6af5502a423da418a6da40dd5f6646ff22e43a23 /llvm/lib/Target/ARM/ARMISelLowering.cpp
parentb403f0c4ed8c32acb36d99d7f7c9b70adaafea8b (diff)
downloadbcm5719-llvm-f45daac30ff6265697ed43ba34b4dc66ca1e7e80.tar.gz
bcm5719-llvm-f45daac30ff6265697ed43ba34b4dc66ca1e7e80.zip
Add support for the 'h' constraint.
Part of rdar://9119939 llvm-svn: 134203
Diffstat (limited to 'llvm/lib/Target/ARM/ARMISelLowering.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp8
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 092ff17edc6..1b9bcc99660 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -7482,6 +7482,7 @@ ARMTargetLowering::getConstraintType(const std::string &Constraint) const {
default: break;
case 'l': return C_RegisterClass;
case 'w': return C_RegisterClass;
+ case 'h': return C_RegisterClass;
}
} else if (Constraint.size() == 2) {
switch (Constraint[0]) {
@@ -7534,11 +7535,16 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
if (Constraint.size() == 1) {
// GCC ARM Constraint Letters
switch (Constraint[0]) {
- case 'l':
+ case 'l': // Low regs or general regs.
if (Subtarget->isThumb())
return Pair(0U, ARM::tGPRRegisterClass);
else
return Pair(0U, ARM::GPRRegisterClass);
+ case 'h': // High regs or no regs.
+ if (Subtarget->isThumb())
+ return Pair(0U, ARM::hGPRRegisterClass);
+ else
+ return Pair(0u, static_cast<const TargetRegisterClass*>(0));
case 'r':
return Pair(0U, ARM::GPRRegisterClass);
case 'w':
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