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path: root/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
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* [WinEH] Mark funclet entries and exits as clobbering all registersReid Kleckner2015-11-061-1/+1
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-2/+1
* TargetRegisterInfo: Provide a way to check assigned registers in getRegAlloca...Matthias Braun2015-07-151-1/+2
* [ARM] Fix handling of thumb1 out-of-range frame offsetsJohn Brawn2015-03-201-1/+1
* Remove some unnecessary forward declarations and put a couple moreEric Christopher2015-03-121-4/+0
* Remove the need to cache the subtarget in the ARM TargetRegisterInfoEric Christopher2015-03-121-6/+1
* Have getCallPreservedMask and getThisCallPreservedMask take aEric Christopher2015-03-111-2/+4
* Have getCalleeSavedRegs take a non-null MachineFunction all theEric Christopher2015-03-111-2/+1
* Have TargetRegisterInfo::getLargestLegalSuperClass take aEric Christopher2015-03-101-1/+2
* Remove dead code.Eric Christopher2015-03-101-2/+0
* Rename UpdateRegAllocHint to match style guidelines.Eric Christopher2015-02-241-1/+1
* Revert 202433 - Provide a target override for the latest regalloc heuristicRenato Golin2014-10-031-2/+0
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* [RegisterCoalescer] Moving the RegisterCoalescer subtarget hook onto the Targ...Chris Bieneman2014-07-161-0/+8
* [C++] Use 'nullptr'.Craig Topper2014-04-281-2/+2
* Make consistent use of MCPhysReg instead of uint16_t throughout the tree.Craig Topper2014-04-041-1/+1
* Simplify resolveFrameIndex() signature.Jim Grosbach2014-04-021-2/+2
* Prune includes in ARM target.Craig Topper2014-03-221-1/+1
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-101-33/+35
* Provide a target override for the latest regalloc heuristic.Andrew Trick2014-02-271-0/+2
* ARM: r12 is callee-saved for interrupt handlersOliver Stannard2014-02-101-2/+2
* ARM: fix bug in -Oz stack adjustment foldingTim Northover2013-12-011-0/+8
* Remove getEHExceptionRegister and getEHHandlerRegister.Rafael Espindola2013-10-071-4/+0
* Clarify and doxygen-ify commentsStephen Lin2013-06-261-8/+8
* ARM: Proactively ensure that the LowerCallResult hack for 'this'-returns is n...Stephen Lin2013-06-261-1/+10
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-071-3/+1
* Add CodeGen support for functions that always return arguments via a new para...Stephen Lin2013-04-201-0/+1
* Move the eliminateCallFramePseudoInstr method from TargetRegisterInfoEli Bendersky2013-02-211-4/+0
* [PEI] Pass the frame index operand number to the eliminateFrameIndex function.Chad Rosier2013-01-311-1/+2
* Remove the old TRI::ResolveRegAllocHint() and getRawAllocationOrder() hooks.Jakob Stoklund Olesen2012-12-041-12/+0
* Implement ARMBaseRegisterInfo::getRegAllocationHints().Jakob Stoklund Olesen2012-12-031-0/+6
* Mark the Int_eh_sjlj_dispatchsetup pseudo instruction as clobbering allChad Rosier2012-11-061-0/+1
* Remove ARMBaseRegisterInfo::isReservedReg().Jakob Stoklund Olesen2012-10-261-2/+0
* Remove the canCombineSubRegIndices() target hook.Jakob Stoklund Olesen2012-10-261-10/+0
* Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen2012-05-071-1/+2
* This patch fixes a problem which arose when using the Post-RA schedulerPreston Gurd2012-04-231-0/+2
* Use uint16_t instead of unsigned to store registers in reg classes. Reduces s...Craig Topper2012-03-041-1/+1
* Use uint16_t to store registers in callee saved register tables to reduce siz...Craig Topper2012-03-041-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Implement ARMBaseRegisterInfo::getCallPreservedMask().Jakob Stoklund Olesen2012-01-171-0/+1
* Fix more places which should be checking for iOS, not darwin.Evan Cheng2012-01-041-7/+7
* Emit a getMatchingSuperRegClass() implementation for every target.Jakob Stoklund Olesen2011-12-191-7/+0
* Change ARM / Thumb2 addc / adde and subc / sube modeling to use physicalEvan Cheng2011-08-301-0/+2
* Thumb parsing diagnostics for low-reg requirements on ADD and MOV.Jim Grosbach2011-08-161-13/+0
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-4/+0
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+3
* Rename TRI::getAllocationOrder() to getRawAllocationOrder().Jakob Stoklund Olesen2011-06-161-4/+3
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+1
* Add a TRI::getLargestLegalSuperClass hook to provide an upper limit on regist...Jakob Stoklund Olesen2011-04-261-0/+3
* Avoid write-after-write issue hazards for Cortex-A9.Bob Wilson2011-04-191-0/+2
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