| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [WinEH] Move WinEHFuncInfo from MachineModuleInfo to MachineFunction | Reid Kleckner | 2015-11-17 | 3 | -98/+51 |
| * | [ARM] Don't pessimize i32 vselect. | Charlie Turner | 2015-11-17 | 1 | -3/+0 |
| * | [AArch64] Promote f16 SELECT_CC CC operands when op is legal. | Ahmed Bougacha | 2015-11-17 | 1 | -1/+7 |
| * | [ARM] Default to ARMv4t in favour of adding Other to ARMArch | Bradley Smith | 2015-11-17 | 2 | -2/+2 |
| * | [ARM] Match VABDL from log2 shuffles. | Charlie Turner | 2015-11-17 | 1 | -0/+23 |
| * | [mips][microMIPS] Implement EXTP, EXTPDP, EXTPDPV, EXTPV, EXTR[_RS].W, EXTR_S... | Zlatko Buljan | 2015-11-17 | 3 | -12/+102 |
| * | [ARM] Properly initialize ARMArch in the ARM subtarget | Bradley Smith | 2015-11-17 | 2 | -3/+3 |
| * | [mips][microMIPS] Implement SUBQ[_S].PH, SUBQ_S.W, SUBQH[_R].PH, SUBQH[_R].W,... | Zlatko Buljan | 2015-11-17 | 2 | -13/+39 |
| * | [Assembler] Make fatal assembler errors non-fatal | Oliver Stannard | 2015-11-17 | 7 | -83/+144 |
| * | [mips][microMIPS] Implement PRECEQ.W.PHL, PRECEQ.W.PHR, PRECEQU.PH.QBL, PRECE... | Zlatko Buljan | 2015-11-17 | 2 | -10/+52 |
| * | Fix typos in comments. | Jay Foad | 2015-11-17 | 1 | -1/+1 |
| * | Drop prelink support. | Rafael Espindola | 2015-11-17 | 5 | -46/+6 |
| * | [WebAssembly] Fix printing of global operands | Derek Schuff | 2015-11-17 | 1 | -4/+4 |
| * | [X86][SSE] Merged BLEND shuffle decode comments. NFC. | Simon Pilgrim | 2015-11-16 | 1 | -48/+8 |
| * | [X86][SSE] Merged ALIGNR/SLLDQ/SRLDQ shuffle decode comments. NFC. | Simon Pilgrim | 2015-11-16 | 1 | -30/+4 |
| * | [X86][SSE] Merged SHUF/PERM shuffle decode comments. NFC. | Simon Pilgrim | 2015-11-16 | 1 | -79/+14 |
| * | [X86][SSE] Merged UNPCK shuffle decode comments. NFC. | Simon Pilgrim | 2015-11-16 | 1 | -193/+75 |
| * | [WebAssembly] Fix function return type printing | Derek Schuff | 2015-11-16 | 3 | -29/+32 |
| * | [WebAssembly] Reverse the order of operands for br_if | Derek Schuff | 2015-11-16 | 2 | -6/+6 |
| * | Find available scratch register to use in function prologue and epilogue as p... | Kit Barton | 2015-11-16 | 2 | -4/+91 |
| * | [WinEH] Don't let UnwindHelp alias the return address | Reid Kleckner | 2015-11-16 | 1 | -6/+6 |
| * | Use the subtarget reference that we already have | Reid Kleckner | 2015-11-16 | 1 | -2/+1 |
| * | [mips] Disable code generation through FastISel for MIPS32R6. | Vasileios Kalintiris | 2015-11-16 | 1 | -3/+3 |
| * | [ARM] Prevent use of a value pointed by end() iterator when placing a jump table | Petr Pavlu | 2015-11-16 | 1 | -0/+2 |
| * | [ARM,AArch64] Store source location of asm constant pool entries | Oliver Stannard | 2015-11-16 | 5 | -8/+12 |
| * | [ARM,AArch64] Store source location for values in assembly files | Oliver Stannard | 2015-11-16 | 4 | -4/+4 |
| * | [WebAssembly] Prototype passes for register coloring and register stackifying. | Dan Gohman | 2015-11-16 | 5 | -0/+341 |
| * | Handle ARMv6KZ naming | Artyom Skrobov | 2015-11-16 | 3 | -6/+5 |
| * | [ARM] Introduce subtarget features per ARM architecture. | Bradley Smith | 2015-11-16 | 4 | -358/+407 |
| * | Properly check if a CMPZ node is in fact comparing against zero | James Molloy | 2015-11-16 | 1 | -0/+6 |
| * | [AArch64] ldr= pseudo-instruction silently ignored if register invalid | Oliver Stannard | 2015-11-16 | 1 | -1/+1 |
| * | AVX512: Implemented encoding and intrinsics for VMOVSHDUP/VMOVSLDUP instructi... | Igor Breger | 2015-11-16 | 4 | -107/+108 |
| * | [WebAssembly] Use tabs instead of spaces in assembly output. | Dan Gohman | 2015-11-15 | 8 | -85/+85 |
| * | [X86][SSE] Tidyup with implicit SDValue bool check. NFC. | Simon Pilgrim | 2015-11-15 | 1 | -8/+5 |
| * | Revert r253160. | Igor Breger | 2015-11-15 | 4 | -108/+107 |
| * | AVX512: Implemented encoding and intrinsics for VMOVSHDUP/VMOVSLDUP instructi... | Igor Breger | 2015-11-15 | 4 | -107/+108 |
| * | [WebAssembly] Minor code simplification. NFC. | Dan Gohman | 2015-11-14 | 1 | -3/+1 |
| * | [WebAssembly] Support signext, zeroext, and several other function attributes. | Dan Gohman | 2015-11-14 | 1 | -22/+0 |
| * | Reduce the size of MCRelaxableFragment. | Akira Hatanaka | 2015-11-14 | 11 | -26/+41 |
| * | [MCTargetAsmParser] Move the member varialbes that reference | Akira Hatanaka | 2015-11-14 | 9 | -111/+126 |
| * | Add MMX to the 3dnow enum and propagate changes around. This makes | Eric Christopher | 2015-11-14 | 3 | -13/+8 |
| * | AArch64: Default AArch64Subtarget::ReserveX18 to true on darwin | Justin Bogner | 2015-11-13 | 1 | -2/+3 |
| * | [Hexagon] Fixing memory leak during relaxation by allocating MCInst in MCCont... | Colin LeMahieu | 2015-11-13 | 1 | -5/+22 |
| * | [WinEH] Fix ESP management with 32-bit __CxxFrameHandler3 | Reid Kleckner | 2015-11-13 | 2 | -1/+17 |
| * | [WebAssembly] Rename the Const instructions to be upper-case too. | Dan Gohman | 2015-11-13 | 1 | -4/+4 |
| * | [WebAssembly] Rename memory intrinsics to be upper-case, following convention... | Dan Gohman | 2015-11-13 | 1 | -4/+4 |
| * | [X86][SSE] Combine UNPCKL with vector_shuffle into UNPCKH to save one instruc... | Cong Hou | 2015-11-13 | 1 | -0/+35 |
| * | [WinEH] Make UnwindHelp a fixed stack object allocated after XMM CSRs | Reid Kleckner | 2015-11-13 | 3 | -16/+45 |
| * | [Hexagon] Factoring bundle creation in to a utility function. | Colin LeMahieu | 2015-11-13 | 8 | -13/+15 |
| * | AMDGPU: Add stony support | Tom Stellard | 2015-11-13 | 1 | -0/+4 |
