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path: root/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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* Enable predication of NEON instructions in Thumb2 mode.Evan Cheng2009-11-241-5/+1
* Add predicate operand to NEON instructions. Fix lots (but not all) 80 col vio...Evan Cheng2009-11-211-12/+35
* Also CSE non-pic load from constant pools.Evan Cheng2009-11-201-1/+4
* Add a target hook to allow changing the tail duplication limit based on theBob Wilson2009-11-181-0/+10
* Detect need for autoalignment of the stack earlier to catch spills moreJim Grosbach2009-11-151-0/+1
* set the def of the VLD1q64 properlyJim Grosbach2009-11-151-2/+1
* - Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng2009-11-141-1/+8
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-091-21/+21
* Use aligned load/store instructions for spilling Q registers when we know the...Jim Grosbach2009-11-081-6/+23
* Refactor code.Evan Cheng2009-11-081-0/+54
* 80-column cleanup of file header commentsJim Grosbach2009-11-071-1/+1
* Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRp...Evan Cheng2009-11-071-0/+33
* Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So i...Evan Cheng2009-11-031-1/+1
* Trim unnecessary include.Evan Cheng2009-11-031-1/+0
* Clean up copyRegToReg.Evan Cheng2009-11-031-27/+13
* Turn neon reg-reg moves fixup code into separate pass. This should reduce the...Anton Korobeynikov2009-11-031-33/+2
* Unbreak ARMBaseRegisterInfo::copyRegToReg.Evan Cheng2009-11-021-18/+19
* Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,...Anton Korobeynikov2009-11-021-8/+46
* Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate theBob Wilson2009-10-281-1/+2
* Don't forget subreg indices when folding load / store.Evan Cheng2009-10-251-10/+30
* 80 col violation.Evan Cheng2009-10-241-1/+2
* -Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixedEvan Cheng2009-10-181-8/+2
* Distinquish stack slots from other stack objects. They (and fixed objects) ge...Evan Cheng2009-10-171-2/+8
* Revert 84315 for now. Re-thinking the patch.Evan Cheng2009-10-171-2/+2
* Rename getFixedStack to getStackObject. The stack objects represented are notEvan Cheng2009-10-171-2/+2
* Add PseudoSourceValues for constpool stuff on ELF (Darwin should use somethin...Anton Korobeynikov2009-10-071-8/+26
* Introduce the TargetInstrInfo::KILL machine instruction and get rid of theJakob Stoklund Olesen2009-09-281-0/+1
* Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudoEvan Cheng2009-09-281-1/+2
* Add QPR_VFP2 regclass and add copy_to_regclass nodes, where needed toAnton Korobeynikov2009-09-121-3/+11
* Add NEON 'laned' operations. This fixes another bunch of gcc testsuite fails andAnton Korobeynikov2009-09-081-10/+25
* Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which can...Evan Cheng2009-08-271-8/+13
* rename TAI -> MAI, being careful not to make MAILJMP instructions :)Chris Lattner2009-08-221-2/+2
* Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.Chris Lattner2009-08-221-2/+2
* Record variable debug info at ISel time directly.Devang Patel2009-08-221-1/+0
* Add Thumb2 eh_sjlj_setjmp implementationJim Grosbach2009-08-111-0/+2
* fix GetInstSizeInBytes for eh_sjlj_setjmpJim Grosbach2009-08-111-1/+1
* Whitespace cleanup. Remove trailing whitespace.Jim Grosbach2009-08-111-5/+5
* Add support for folding loads / stores into 16-bit moves used by Thumb2.Evan Cheng2009-08-101-37/+61
* 80 col violation.Evan Cheng2009-08-101-2/+3
* Use VLDM / VSTM to spill/reload 128-bit Neon registersAnton Korobeynikov2009-08-081-4/+13
* Code refactoring. No functionality change.Evan Cheng2009-08-081-0/+16
* Fix support to use NEON for single precision fp math.Evan Cheng2009-08-071-5/+7
* It turns out most of the thumb2 instructions are not allowed to touch SP. The...Evan Cheng2009-08-071-1/+1
* When using NEON for single-precision FP, the NEON result must be placed in D0...David Goodwin2009-08-051-7/+13
* Move the getInlineAsmLength virtual method from TAI to TII, whereChris Lattner2009-08-021-2/+2
* Workaround a couple of Darwin assembler bugs.Evan Cheng2009-08-011-3/+8
* t2BR_JT is mov pc, it's 2 byte long, not 4.Evan Cheng2009-07-311-9/+9
* - Teach TBB / TBH offset limits are 510 and 131070 respectively since the offsetEvan Cheng2009-07-311-3/+8
* - More refactoring. This gets rid of all of the getOpcode calls.Evan Cheng2009-07-281-7/+151
* convertToThreeAddress can't handle Thumb2 instructions (which don't have same...Evan Cheng2009-07-271-10/+7
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