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path: root/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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* Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen2010-06-021-10/+2
* Clean up 80 column violations. No functional change.Jim Grosbach2010-06-021-5/+5
* Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola2010-06-021-1/+2
* Update the saved stack pointer in the sjlj function context following eitherJim Grosbach2010-05-271-2/+2
* Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enumsJakob Stoklund Olesen2010-05-241-32/+32
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-221-0/+37
* Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.Jim Grosbach2010-05-221-0/+4
* Added a QQQQ register file to model 4-consecutive Q registers.Evan Cheng2010-05-141-13/+41
* Bring back VLD1q and VST1q and use them for reloading / spilling Q registers....Evan Cheng2010-05-131-29/+69
* Use VLD2q32 / VST2q32 to reload / spill QQ (pair of Q) registers when stack s...Evan Cheng2010-05-071-5/+39
* Use VSTMD / VLDMD for spills and reloads of Q registers instead of VSTMQ / VL...Evan Cheng2010-05-071-9/+15
* Remove VLD1q and VST1q for reloading and spilling Q registers. Just use VLD1q...Evan Cheng2010-05-071-9/+23
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-4/+2
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-2/+4
* Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coa...Evan Cheng2010-05-061-16/+35
* Revert r103157, which broke test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll.Dan Gohman2010-05-061-4/+2
* Revert r103156 since it was breaking the build bots.Eric Christopher2010-05-061-31/+14
* Fix an obvious bug in isMoveInstr. It needs to return sub-register indices.Evan Cheng2010-05-061-2/+4
* Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registe...Evan Cheng2010-05-061-14/+31
* Cosmetic changes.Evan Cheng2010-05-061-7/+7
* storeRegToStackSlot has forgotten about QPR_8 register class.Evan Cheng2010-05-061-1/+2
* Frame index can be negative.Evan Cheng2010-04-291-1/+1
* Add sizes non-floating point versions for the eh sjlj intrinsic expansions.Jim Grosbach2010-04-281-1/+2
* Add ARM specific emitFrameIndexDebugValue.Evan Cheng2010-04-261-0/+10
* Educate GetInstrSizeInBytes implementations thatDale Johannesen2010-04-071-0/+1
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-4/+4
* Teach AnalyzeBranch, RemoveBranch and the branchDale Johannesen2010-04-021-1/+14
* Fix VLDMQ and VSTMQ instructions to use the correct encoding and address modes.Bob Wilson2010-03-231-2/+6
* Rename some instructions to match the corresponding NEON opcode.Bob Wilson2010-03-231-2/+2
* Change VST1 instructions for loading Q register values to operate on pairsBob Wilson2010-03-231-1/+1
* Change VLD1 instructions for loading Q register values to operate on pairsBob Wilson2010-03-231-1/+1
* Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")Bob Wilson2010-03-201-4/+3
* Refactor Reg-Reg copy emission routine for ARM. This makes cross-regclass cop...Anton Korobeynikov2010-03-181-29/+39
* Revert 98683. It is breaking something in the disassembler.Bob Wilson2010-03-161-3/+4
* Remove redundant writeback flag from ARM address mode 6. Also remove theBob Wilson2010-03-161-4/+3
* - Change MachineInstr::isIdenticalTo to take a new option that determines whe...Evan Cheng2010-03-031-4/+3
* Handle tGPR register class in a few more places. This fixes some llvm-gccBob Wilson2010-02-161-0/+10
* Fix pr6111: Avoid using the LR register for the target address of an indirectBob Wilson2010-02-161-0/+7
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-4/+4
* tighten up eh.setjmp sequence a bit.Jim Grosbach2010-02-081-2/+2
* Adjust setjmp instruction sequence to not need 32-bit alignment paddingJim Grosbach2010-01-271-1/+1
* prep work to support a future where getJumpTableInfo will returnChris Lattner2010-01-251-0/+1
* For aligned load/store instructions, it's only required to know whether aJim Grosbach2010-01-191-2/+2
* Add Target hook to duplicate machine instructions.Jakob Stoklund Olesen2010-01-061-21/+46
* Remove dead variable.Bill Wendling2009-12-281-2/+0
* remove out of date FIXME.Jim Grosbach2009-12-031-1/+0
* fix a build problem with VC++, PR5664, patch by Alp Toker!Chris Lattner2009-12-031-2/+4
* Thumb1 exception handling setjmpJim Grosbach2009-12-011-0/+2
* Remove isProfitableToDuplicateIndirectBranch target hook. It is profitableBob Wilson2009-11-301-6/+0
* Refactor target hook for tail duplication as requested by Chris.Bob Wilson2009-11-241-6/+2
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