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| author | Bob Wilson <bob.wilson@apple.com> | 2010-02-16 17:24:15 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-02-16 17:24:15 +0000 |
| commit | 70aa8d074599e622822d208512e8fc71f0ec4f8d (patch) | |
| tree | 4902efb26c6c8c24dcae61dc83455e5a6e340097 /llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | |
| parent | 3eac2454dccd767fb0a6ecadf824dce498b4d28e (diff) | |
| download | bcm5719-llvm-70aa8d074599e622822d208512e8fc71f0ec4f8d.tar.gz bcm5719-llvm-70aa8d074599e622822d208512e8fc71f0ec4f8d.zip | |
Fix pr6111: Avoid using the LR register for the target address of an indirect
branch in ARM v4 code, since it gets clobbered by the return address before
it is used. Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.
llvm-svn: 96360
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 6fe7c2c8c6a..7b35a06b945 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -643,6 +643,13 @@ ARMBaseInstrInfo::copyRegToReg(MachineBasicBlock &MBB, DebugLoc DL = DebugLoc::getUnknownLoc(); if (I != MBB.end()) DL = I->getDebugLoc(); + // tGPR is used sometimes in ARM instructions that need to avoid using + // certain registers. Just treat it as GPR here. + if (DestRC == ARM::tGPRRegisterClass) + DestRC = ARM::GPRRegisterClass; + if (SrcRC == ARM::tGPRRegisterClass) + SrcRC = ARM::GPRRegisterClass; + if (DestRC != SrcRC) { if (DestRC->getSize() != SrcRC->getSize()) return false; |
