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path: root/llvm/lib/Target/AMDGPU/SIInstrInfo.h
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* [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/STRon Lieberman2018-11-161-0/+3
* Revert "AMDGPU: Divergence-driven selection of scalar buffer load intrinsics"Nicolai Haehnle2018-11-071-0/+2
* AMDGPU: Divergence-driven selection of scalar buffer load intrinsicsNicolai Haehnle2018-10-171-2/+0
* [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructionsScott Linder2018-10-081-11/+21
* [AMDGPU] Assert in getOpSize() there are no sub-dword subregsStanislav Mekhanoshin2018-10-031-1/+6
* [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregsStanislav Mekhanoshin2018-10-011-0/+5
* [AMDGPU] Preliminary patch for divergence driven instruction selection. Immed...Alexander Timofeev2018-09-111-0/+3
* Revert r341413Scott Linder2018-09-061-6/+0
* [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructionsScott Linder2018-09-041-0/+6
* AMDGPU: Shrink insts to fold immediatesMatt Arsenault2018-08-281-0/+3
* AMDGPU: Move canShrink into TIIMatt Arsenault2018-08-281-0/+3
* [AMDGPU] Add support for multi-dword s.buffer.load intrinsicTim Renouf2018-08-251-0/+2
* [PSV] Update API to be able to use TargetCustom without UB.Marcello Maggioni2018-08-201-1/+1
* AMDGPU: Force skip over s_sendmsg and exp instructionsNicolai Haehnle2018-07-301-0/+3
* AMDGPU: Refactor Subtarget classesTom Stellard2018-07-111-3/+3
* AMDGPU: Separate R600 and GCN TableGen filesTom Stellard2018-06-281-2/+14
* AMDGPU: Turn D16 for MIMG instructions into a regular operandNicolai Haehnle2018-06-211-8/+0
* AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headersTom Stellard2018-05-221-12/+1
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-20/+20
* [AMDGPU][MC] Added lds support for MUBUF instructionsDmitry Preobrazhensky2018-02-211-0/+3
* [NFC] fix trivial typos in commentsHiroshi Inoue2018-01-241-1/+1
* AMDGPU/SI: Add d16 support for image intrinsics.Changpeng Fang2018-01-181-0/+8
* AMDGPU: Use gfx9 carry-less add/sub instructionsMatt Arsenault2017-11-301-3/+4
* AMDGPU: Replace list of SMEM buffer opcodesMatt Arsenault2017-11-171-0/+13
* AMDGPU: Replace i64 add/sub loweringMatt Arsenault2017-11-151-1/+5
* AMDGPU: Fold immediate offset into BUFFER_LOAD_DWORD lowered from SMEMMarek Olsak2017-11-091-0/+4
* AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1)Marek Olsak2017-10-241-0/+3
* AMDGPU: Fix not accounting for instruction size in bundlesMatt Arsenault2017-10-041-0/+1
* AMDGPU: Start selecting s_xnor_{b32, b64}Konstantin Zhuravlyov2017-09-181-0/+3
* Fix warnings in r313297.Jan Sjodin2017-09-141-2/+2
* Add AddresSpace to PseudoSourceValue.Jan Sjodin2017-09-141-0/+3
* Allow target to decide when to cluster loads/stores in mischedStanislav Mekhanoshin2017-09-131-1/+2
* AMDGPU: Fold clamp modifier for packed instructionsMatt Arsenault2017-08-311-2/+14
* [AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use war...Eugene Zelenko2017-08-081-15/+30
* AMDGPU: Make areMemAccessesTriviallyDisjoint more aware of segment flatMatt Arsenault2017-07-291-0/+8
* AMDGPU: Don't track lgkmcnt for global_/scratch_ instructionsMatt Arsenault2017-07-211-0/+4
* [AMDGPU] Do not insert an instruction into worklist twice in movetovaluAlfred Huang2017-07-141-8/+11
* AMDGPU: Add operand target flags serializationMatt Arsenault2017-07-021-0/+8
* [AMDGPU] SDWA: merge VI and GFX9 pseudo instructionsSam Kolton2017-06-211-0/+3
* Re-submit AMDGPUMachineCFGStructurizer.Jan Sjodin2017-05-151-1/+32
* Revert 303091.Jan Sjodin2017-05-151-32/+1
* Add AMDGPUMachineCFGStructurizer.Jan Sjodin2017-05-151-1/+32
* Move size and alignment information of regclass to TargetRegisterInfoKrzysztof Parzyszek2017-04-241-2/+2
* [AMDGPU] added SIInstrInfo::getAddNoCarry() helperStanislav Mekhanoshin2017-04-141-0/+9
* [AMDGPU] SDWA Peephole: improve search for immediates in SDWA patternsSam Kolton2017-03-311-0/+2
* [ADMGPU] SDWA peephole optimization pass.Sam Kolton2017-03-211-0/+3
* AMDGPU: Fix broken condition in hazard recognizerMatt Arsenault2017-03-171-0/+8
* AMDGPU: Support v2i16/v2f16 packed operationsMatt Arsenault2017-02-271-22/+3
* AMDGPU: Don't fold immediate if clamp/omod are setMatt Arsenault2017-02-271-0/+1
* AMDGPU: Add VOP3P instruction formatMatt Arsenault2017-02-271-0/+8
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