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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-07-02 23:21:48 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-07-02 23:21:48 +0000 |
| commit | 3f031e75aaa9579de41e45dcdc0e22a6cdb96f13 (patch) | |
| tree | aab62d27a11bb31b68e1e3e1786320b0b70148ba /llvm/lib/Target/AMDGPU/SIInstrInfo.h | |
| parent | f05c5ef44197057742fc1143ddfdcb8b6fc516af (diff) | |
| download | bcm5719-llvm-3f031e75aaa9579de41e45dcdc0e22a6cdb96f13.tar.gz bcm5719-llvm-3f031e75aaa9579de41e45dcdc0e22a6cdb96f13.zip | |
AMDGPU: Add operand target flags serialization
llvm-svn: 306995
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h index 74b48c76180..d00c0d4a7f4 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h @@ -100,6 +100,8 @@ protected: public: enum TargetOperandFlags { + MO_MASK = 0x7, + MO_NONE = 0, // MO_GOTPCREL -> symbol@GOTPCREL -> R_AMDGPU_GOTPCREL. MO_GOTPCREL = 1, @@ -781,9 +783,15 @@ public: void convertNonUniformLoopRegion(MachineBasicBlock *LoopEntry, MachineBasicBlock *LoopEnd) const; + std::pair<unsigned, unsigned> + decomposeMachineOperandsTargetFlags(unsigned TF) const override; + ArrayRef<std::pair<int, const char *>> getSerializableTargetIndices() const override; + ArrayRef<std::pair<unsigned, const char *>> + getSerializableDirectMachineOperandTargetFlags() const override; + ScheduleHazardRecognizer * CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, const ScheduleDAG *DAG) const override; |
