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authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2017-04-14 00:33:44 +0000
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2017-04-14 00:33:44 +0000
commit86b0a5465be50b362c2a2748a5523a6f63778470 (patch)
treeb0efe4865c21a4909cf82fecdaa3cc5871125436 /llvm/lib/Target/AMDGPU/SIInstrInfo.h
parent8f56846d4f86efc9dccd5b64d569878191dcaaf5 (diff)
downloadbcm5719-llvm-86b0a5465be50b362c2a2748a5523a6f63778470.tar.gz
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[AMDGPU] added SIInstrInfo::getAddNoCarry() helper
Addressed rest of post submit comments from D31993. Differential Revision: https://reviews.llvm.org/D32057 llvm-svn: 300288
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInstrInfo.h')
-rw-r--r--llvm/lib/Target/AMDGPU/SIInstrInfo.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 18099abc101..659473ca6a4 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -761,6 +761,15 @@ public:
CreateTargetPostRAHazardRecognizer(const MachineFunction &MF) const override;
bool isBasicBlockPrologue(const MachineInstr &MI) const override;
+
+ /// \brief Return a partially built integer add instruction without carry.
+ /// Caller must add source operands.
+ /// For pre-GFX9 it will generate unused carry destination operand.
+ /// TODO: After GFX9 it should return a no-carry operation.
+ MachineInstrBuilder getAddNoCarry(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ const DebugLoc &DL,
+ unsigned DestReg) const;
};
namespace AMDGPU {
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