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path: root/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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* [AMDGPU] Add buffer/load 8/16 bit overloaded intrinsicsRyan Taylor2019-03-191-0/+22
* [TargetLowering] Add code size information on isFPImmLegal. NFCAdhemerval Zanella2019-03-181-1/+2
* [AMDGPU] Prepare for introduction of v3 and v5 MVTsTim Renouf2019-03-171-3/+4
* AMDGPU: Move d16 load matching to preprocess stepMatt Arsenault2019-03-081-0/+6
* AMDGPU: Fix crashes in invalid call casesMatt Arsenault2019-02-281-4/+3
* Implementation of asm-goto support in LLVMCraig Topper2019-02-081-0/+1
* AMDGPU: Fix assert on trunc from bitcast of build_vectorMatt Arsenault2019-02-051-1/+1
* [AMDGPU] Add intrinsics for 16 bit interpolationTim Corringham2019-01-281-0/+3
* Codegen support for atomicrmw fadd/fsubMatt Arsenault2019-01-221-3/+7
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* AMDGPU: Remove llvm.SI.load.constMatt Arsenault2019-01-181-1/+0
* AMDGPU: Add llvm.amdgcn.ds.ordered.add & swapMarek Olsak2019-01-161-0/+1
* [TargetLowering][AMDGPU] Remove the SimplifyDemandedBits function that takes ...Craig Topper2019-01-071-30/+52
* [AMDGPU] Always use the version of computeKnownBits that returns a value. NFCI.Simon Pilgrim2018-12-211-14/+7
* [x86] allow vector load narrowing with multi-use valuesSanjay Patel2018-11-101-1/+4
* AMDGPU: Fix assertion with bitcast from i64 constant to v4i16Matt Arsenault2018-11-021-3/+4
* Check shouldReduceLoadWidth from SimplifySetCCStanislav Mekhanoshin2018-10-311-0/+12
* DAG: Change behavior of fminnum/fmaxnum nodesMatt Arsenault2018-10-221-0/+8
* AMDGPU: Expand atomicrmw nand in IRMatt Arsenault2018-10-021-0/+7
* AMDGPU: Expand vector canonicalizesMatt Arsenault2018-09-181-0/+1
* AMDGPU: Remove remnants of old address space mappingMatt Arsenault2018-08-311-4/+3
* [AMDGPU] Add support for multi-dword s.buffer.load intrinsicTim Renouf2018-08-251-0/+1
* AMDGPU: Fix not respecting byval alignment in call frame setupMatt Arsenault2018-08-221-2/+1
* AMDGPU: Custom lower fexpMatt Arsenault2018-08-161-0/+32
* AMDGPU: Fold fneg into fmed3Matt Arsenault2018-08-151-0/+11
* AMDGPU: Address todo for handling 1/(2 pi)Matt Arsenault2018-08-151-6/+23
* AMDGPU: More canonicalized operationsMatt Arsenault2018-08-101-1/+11
* AMDGPU: cvt_pk_rtz_f16 canonicalizesMatt Arsenault2018-08-061-1/+2
* AMDGPU: Treat more custom operations as canonicalizingMatt Arsenault2018-08-061-1/+4
* DAG: Enhance isKnownNeverNaNMatt Arsenault2018-08-031-0/+83
* AMDGPU: Make fneg combine handle fcanonicalizeMatt Arsenault2018-07-301-0/+2
* DAG: Add calling convention argument to calling convention funcsMatt Arsenault2018-07-281-4/+3
* AMDGPU: Stop trying to extend arguments for cloverMatt Arsenault2018-07-281-5/+1
* Reapply "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Matt Arsenault2018-07-201-75/+108
* [AMDGPU] [AMDGPU] Support a fdot2 pattern.Farhana Aleen2018-07-161-0/+1
* Revert "AMDGPU: Fix handling of alignment padding in DAG argument lowering"Evgeniy Stepanov2018-07-141-108/+75
* AMDGPU: Fix handling of alignment padding in DAG argument loweringMatt Arsenault2018-07-131-75/+108
* AMDGPU: Fix assert in truncate combine with vectorsMatt Arsenault2018-07-121-1/+1
* AMDGPU: Refactor Subtarget classesTom Stellard2018-07-111-5/+5
* AMDGPU: Fix UBSan error caused by r335942Tom Stellard2018-07-061-1/+2
* AMDGPU/GlobalISel: Implement custom kernel arg loweringMatt Arsenault2018-07-051-2/+2
* AMDGPU: Separate R600 and GCN TableGen filesTom Stellard2018-06-281-52/+5
* AMDGPU: Remove MFI::ABIArgOffsetMatt Arsenault2018-06-281-3/+7
* [AMDGPU] Convert rcp to rcp_iflagStanislav Mekhanoshin2018-06-271-10/+18
* AMDGPU: Remove old-style image intrinsicsNicolai Haehnle2018-06-211-76/+0
* AMDGPU: Make v4i16/v4f16 legalMatt Arsenault2018-06-151-2/+16
* [AMDGPU] Corrected computeKnownBits for V_PERM_B32Stanislav Mekhanoshin2018-06-131-7/+8
* AMDGPU: Move isSDNodeSourceOfDivergence() implementation to SITargetLoweringTom Stellard2018-06-131-69/+0
* [AMDGPU] DAG combine to produce V_PERM_B32Stanislav Mekhanoshin2018-06-121-0/+29
* AMDGPU: Error on LDS global address in functionsMatt Arsenault2018-06-081-1/+9
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