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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-07-12 19:40:16 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-07-12 19:40:16 +0000 |
| commit | 4dca0a9904a168c7f4e0d016fbb293a55733b198 (patch) | |
| tree | 224003480a911347972c5c580319e2f41b2d9ab8 /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | |
| parent | f03f32d4784f2b808dfdff568bcc023331e96cdb (diff) | |
| download | bcm5719-llvm-4dca0a9904a168c7f4e0d016fbb293a55733b198.tar.gz bcm5719-llvm-4dca0a9904a168c7f4e0d016fbb293a55733b198.zip | |
AMDGPU: Fix assert in truncate combine with vectors
The piece above probably has the same problem, but I need
to try to come up with a test for it.
llvm-svn: 336935
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 7db4703ffde..acdedab7e13 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -3021,7 +3021,7 @@ SDValue AMDGPUTargetLowering::performTruncateCombine( // Equivalent of above for accessing the high element of a vector as an // integer operation. // trunc (srl (bitcast (build_vector x, y))), 16 -> trunc (bitcast y) - if (Src.getOpcode() == ISD::SRL) { + if (Src.getOpcode() == ISD::SRL && !VT.isVector()) { if (auto K = isConstOrConstSplat(Src.getOperand(1))) { if (2 * K->getZExtValue() == Src.getValueType().getScalarSizeInBits()) { SDValue BV = stripBitcast(Src.getOperand(0)); |
