| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | AMDGPU/SI: Use new SimplifyDemandedBits helper for multi-use operations | Tom Stellard | 2016-10-14 | 1 | -13/+10 |
| * | Revert "In visitSTORE, always use FindBetterChain, rather than only when UseA... | Nirav Dave | 2016-10-13 | 1 | -0/+10 |
| * | In visitSTORE, always use FindBetterChain, rather than only when UseAA is ena... | Nirav Dave | 2016-10-13 | 1 | -10/+0 |
| * | Target: Remove unused entities. | Peter Collingbourne | 2016-10-09 | 1 | -1/+0 |
| * | Revert "In visitSTORE, always use FindBetterChain, rather than only when UseA... | Nirav Dave | 2016-09-28 | 1 | -0/+10 |
| * | In visitSTORE, always use FindBetterChain, rather than only when UseAA is ena... | Nirav Dave | 2016-09-28 | 1 | -10/+0 |
| * | AMDGPU: Push bitcasts through build_vector | Matt Arsenault | 2016-09-17 | 1 | -0/+27 |
| * | AMDGPU/SI: Fix kernel argument ABI for HSA | Tom Stellard | 2016-09-16 | 1 | -1/+2 |
| * | AMDGPU: Refactor kernel argument lowering | Tom Stellard | 2016-09-16 | 1 | -34/+97 |
| * | AMDGPU: Improve splitting 64-bit bit ops by constants | Matt Arsenault | 2016-09-14 | 1 | -35/+11 |
| * | AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is 8-byte aligned for HSA | Tom Stellard | 2016-09-09 | 1 | -1/+2 |
| * | AMDGPU: Fix introducing stack access on unaligned v16i8 | Matt Arsenault | 2016-08-31 | 1 | -1/+8 |
| * | AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is at least 4-byte aligned | Tom Stellard | 2016-08-31 | 1 | -1/+1 |
| * | AMDGPU/R600: Remove MergeVectorStores from legalization | Jan Vesely | 2016-08-29 | 1 | -59/+0 |
| * | AMDGPU: Select mulhi 24-bit instructions | Matt Arsenault | 2016-08-27 | 1 | -6/+121 |
| * | [X86] Heuristic to selectively build Newton-Raphson SQRT estimation | Nikolai Bozhenov | 2016-08-04 | 1 | -2/+0 |
| * | AMDGPU : Add intrinsics for compare with the full wavefront result | Wei Ding | 2016-07-28 | 1 | -0/+1 |
| * | AMDGPU: Turn dead checks into asserts | Matt Arsenault | 2016-07-28 | 1 | -9/+5 |
| * | AMDGPU: Make AMDGPUMachineFunction fields private | Matt Arsenault | 2016-07-26 | 1 | -19/+3 |
| * | AMDGPU: Add fp legacy instruction intrinsics | Matt Arsenault | 2016-07-26 | 1 | -0/+2 |
| * | AMDGPU: Delete dead code | Matt Arsenault | 2016-07-25 | 1 | -8/+0 |
| * | AMDGPU: Delete dead code | Matt Arsenault | 2016-07-23 | 1 | -93/+0 |
| * | AMDGPU: Only use legal inline immediates with kill pseudo | Matt Arsenault | 2016-07-19 | 1 | -0/+1 |
| * | AMDGPU: Fix missing switch case warning | Matt Arsenault | 2016-07-18 | 1 | -0/+1 |
| * | AMDGPU: Remove brev intrinsic | Matt Arsenault | 2016-07-15 | 1 | -3/+0 |
| * | AMDGPU: Remove AMDGPU.ldexp | Matt Arsenault | 2016-07-15 | 1 | -4/+0 |
| * | [SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore,... | Justin Lebar | 2016-07-15 | 1 | -42/+24 |
| * | AMDGPU: Remove dead code | Matt Arsenault | 2016-07-14 | 1 | -9/+0 |
| * | AMDGPU: Remove last AMDIL intrinsics | Matt Arsenault | 2016-07-13 | 1 | -5/+1 |
| * | AMDGPU: Expand unaligned accesses early | Matt Arsenault | 2016-07-01 | 1 | -20/+47 |
| * | AMDGPU: Improve load/store of illegal types. | Matt Arsenault | 2016-07-01 | 1 | -37/+97 |
| * | AMDGPU: Cleanup subtarget handling. | Matt Arsenault | 2016-06-24 | 1 | -1/+1 |
| * | [AMDGPU] Remove exit-on-error in test (PR27761) | Diana Picus | 2016-06-23 | 1 | -1/+2 |
| * | AMDGPU: Fix verifier errors in SILowerControlFlow | Matt Arsenault | 2016-06-22 | 1 | -2/+3 |
| * | AMDGPU: Fix kernel argument alignment impacting stack size | Matt Arsenault | 2016-06-18 | 1 | -7/+9 |
| * | AMDGPU/SI: Refactor fixup handling for constant addrspace variables | Tom Stellard | 2016-06-14 | 1 | -0/+1 |
| * | Revert "AMDGPU/SI: Refactor fixup handling for constant addrspace variables" | Tom Stellard | 2016-06-14 | 1 | -1/+0 |
| * | AMDGPU/SI: Refactor fixup handling for constant addrspace variables | Tom Stellard | 2016-06-14 | 1 | -0/+1 |
| * | Pass DebugLoc and SDLoc by const ref. | Benjamin Kramer | 2016-06-12 | 1 | -22/+17 |
| * | AMDGPU: Temporary fix for broken store combine | Matt Arsenault | 2016-06-02 | 1 | -0/+2 |
| * | AMDGPU: Fix inconsistent lowering of select of vectors | Matt Arsenault | 2016-05-25 | 1 | -1/+9 |
| * | AMDGPU: Cleanup lowering actions | Matt Arsenault | 2016-05-21 | 1 | -121/+169 |
| * | AMDGPU: Fix high bits after division optimization | Matt Arsenault | 2016-05-21 | 1 | -17/+36 |
| * | AMDGPU: Remove pointless conversions | Matt Arsenault | 2016-05-19 | 1 | -30/+10 |
| * | AMDGPU: Fix assert when erroring on a call | Matt Arsenault | 2016-05-18 | 1 | -1/+5 |
| * | AMDGPU: Unify LowerGlobalAddress | Jan Vesely | 2016-05-13 | 1 | -0/+5 |
| * | AMDGPU: Move R600 specific code out of AMDGPUISelLowering.cpp | Tom Stellard | 2016-05-02 | 1 | -39/+0 |
| * | [CodeGen] Default CTTZ_ZERO_UNDEF/CTLZ_ZERO_UNDEF to Expand in TargetLowering... | Craig Topper | 2016-04-28 | 1 | -8/+2 |
| * | [CodeGen] Add getBuildVector and getSplatBuildVector helpers. NFCI. | Ahmed Bougacha | 2016-04-26 | 1 | -20/+14 |
| * | AMDGPU: Add DAG to debug dump | Matt Arsenault | 2016-04-25 | 1 | -2/+2 |
