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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-09-09 19:28:00 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-09-09 19:28:00 +0000 |
| commit | b2869eb6e98cb6b1730bca86b48c007970c861d7 (patch) | |
| tree | 08553438e6b1aee929867b64e3052814ed5a509a /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | |
| parent | 88f6407542c55ae3723831baf6e549e045db8138 (diff) | |
| download | bcm5719-llvm-b2869eb6e98cb6b1730bca86b48c007970c861d7.tar.gz bcm5719-llvm-b2869eb6e98cb6b1730bca86b48c007970c861d7.zip | |
AMDGPU/SI: Make sure llvm.amdgcn.implicitarg.ptr() is 8-byte aligned for HSA
Reviewers: arsenm
Subscribers: arsenm, wdng, nhaehnle, llvm-commits
Differential Revision: https://reviews.llvm.org/D24405
llvm-svn: 281080
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 682157bc4ca..ed24292d731 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -2690,7 +2690,8 @@ SDValue AMDGPUTargetLowering::CreateLiveInRegister(SelectionDAG &DAG, uint32_t AMDGPUTargetLowering::getImplicitParameterOffset( const AMDGPUMachineFunction *MFI, const ImplicitParameter Param) const { - uint64_t ArgOffset = alignTo(MFI->getABIArgOffset(), 4); + unsigned Alignment = Subtarget->getAlignmentForImplicitArgPtr(); + uint64_t ArgOffset = alignTo(MFI->getABIArgOffset(), Alignment); switch (Param) { case GRID_DIM: return ArgOffset; |
