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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-08-31 21:52:27 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-08-31 21:52:27 +0000 |
commit | b50eb8dc2b3cb0005eb0187e1cb9fe7a68a0a070 (patch) | |
tree | 1f875e2ae1e0edf29eb006cba4f3bd5919445df1 /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | |
parent | 1d2151781b7ab164c56f2d9694725e6373df5eb4 (diff) | |
download | bcm5719-llvm-b50eb8dc2b3cb0005eb0187e1cb9fe7a68a0a070.tar.gz bcm5719-llvm-b50eb8dc2b3cb0005eb0187e1cb9fe7a68a0a070.zip |
AMDGPU: Fix introducing stack access on unaligned v16i8
llvm-svn: 280298
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 32e40a2c7a7..682157bc4ca 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -2012,6 +2012,9 @@ SDValue AMDGPUTargetLowering::performLoadCombine(SDNode *N, // problems during legalization, the emitted instructions to pack and unpack // the bytes again are not eliminated in the case of an unaligned copy. if (!allowsMisalignedMemoryAccesses(VT, AS, Align, &IsFast)) { + if (VT.isVector()) + return scalarizeVectorLoad(LN, DAG); + SDValue Ops[2]; std::tie(Ops[0], Ops[1]) = expandUnalignedLoad(LN, DAG); return DAG.getMergeValues(Ops, SDLoc(N)); @@ -2060,8 +2063,12 @@ SDValue AMDGPUTargetLowering::performStoreCombine(SDNode *N, // order problems during legalization, the emitted instructions to pack and // unpack the bytes again are not eliminated in the case of an unaligned // copy. - if (!allowsMisalignedMemoryAccesses(VT, AS, Align, &IsFast)) + if (!allowsMisalignedMemoryAccesses(VT, AS, Align, &IsFast)) { + if (VT.isVector()) + return scalarizeVectorStore(SN, DAG); + return expandUnalignedStore(SN, DAG); + } if (!IsFast) return SDValue(); |