summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
Commit message (Expand)AuthorAgeFilesLines
* [AArch64][SVE] Add patterns for some arith SVE instructions.Danilo Carvalho Grael2020-01-131-0/+29
* [SelectionDAG] Disallow indirect "i" constraintFangrui Song2019-12-291-1/+0
* Fix "result of 32-bit shift implicitly converted to 64 bits" warning. NFC.Simon Pilgrim2019-12-211-1/+1
* [AArch64][SVE] Fold constant multiply of element countCullen Rhodes2019-12-201-0/+22
* [AArch64] match fcvtl2 with bitcasted extractSanjay Patel2019-12-181-0/+35
* [AArch64][SVE] Change pattern generation code to fix -Wimplicit-fallthrough a...Fangrui Song2019-12-161-4/+11
* [AArch64][SVE] Add patterns for logical immediate operations.Danilo Carvalho Grael2019-12-161-0/+36
* [AArch64][SVE] Add integer arithmetic with immediate instructions.Danilo Carvalho Grael2019-12-121-0/+41
* [IR] Split out target specific intrinsic enums into separate headersReid Kleckner2019-12-111-0/+1
* [PGO][PGSO] DAG.shouldOptForSize part.Hiroshi Yamauchi2019-11-211-6/+2
* [AArch64] Fix unannotated fall-through between switch labelsJinsong Ji2019-10-281-0/+1
* [AArch64][SVE] Implement masked load intrinsicsKerry McLaughlin2019-10-281-0/+20
* [DAG] Add SelectionDAG::MaxRecursionDepth constantSimon Pilgrim2019-09-191-1/+1
* [aarch64] move custom isel of extract_vector_elt to td file - NFCSebastian Pop2019-09-131-43/+0
* Basic codegen for MTE stack tagging.Evgeniy Stepanov2019-07-171-1/+59
* AArch64: Add support for reading pc using llvm.read_register.Peter Collingbourne2019-06-221-0/+8
* Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.Simon Pilgrim2019-04-231-2/+2
* [AArch64] Add support for MTE intrinsicsJaved Absar2019-04-231-17/+46
* [IR] Refactor attribute methods in Function class (NFC)Evandro Menezes2019-04-041-1/+1
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [AArch64] Always use the version of computeKnownBits that returns a value. NFCI.Simon Pilgrim2018-12-211-6/+3
* [AArch64][v8.5A] Add speculation restriction system registersOliver Stannard2018-09-271-1/+1
* [SDAG] Remove the reliance on MI's allocation strategy forChandler Carruth2018-08-141-21/+16
* Revert "[AArch64] Coalesce Copy Zero during instruction selection"Sirish Pande2018-06-211-29/+1
* [AArch64] Take advantage of variable shift/rotate amount implicit mod operation.Geoff Berry2018-05-241-0/+111
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-8/+10
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-3/+3
* Reland r329956, "AArch64: Introduce a DAG combine for folding offsets into ad...Peter Collingbourne2018-04-231-8/+10
* Revert r329956, "AArch64: Introduce a DAG combine for folding offsets into ad...Peter Collingbourne2018-04-131-10/+8
* AArch64: Introduce a DAG combine for folding offsets into addresses.Peter Collingbourne2018-04-121-8/+10
* Revert r329611, "AArch64: Allow offsets to be folded into addresses with ELF."Peter Collingbourne2018-04-101-10/+8
* AArch64: Allow offsets to be folded into addresses with ELF.Peter Collingbourne2018-04-091-8/+10
* [AArch64] Fix UB about shift amount exceeds data bit-widthWeiming Zhao2018-03-081-1/+1
* [AArch64] Coalesce Copy Zero during instruction selectionHaicheng Wu2018-02-181-1/+29
* [SelectionDAGISel] Add a debug print before call to Select. Adjust where blan...Craig Topper2018-01-261-5/+0
* AArch64: get type from correct result when forming BFXTim Northover2018-01-231-1/+1
* AArch64: get type from correct result when forming BFI/BFMTim Northover2018-01-231-1/+1
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* [AArch64] Avoid selecting XZR inline ASM memory operandYi Kong2017-07-141-4/+11
* [AARCH64][LSE] Preliminary support for ARMv8.1 LSE Atomics.Christof Douma2017-06-211-4/+11
* [llvm] Remove double semicolonsMandeep Singh Grang2017-06-061-1/+1
* [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem...Craig Topper2017-04-281-12/+13
* [APInt] Use inplace shift methods where possible. NFCICraig Topper2017-04-281-10/+10
* Revert "[APInt] Fix a few places that use APInt::getRawData to operate within...Renato Golin2017-04-231-10/+10
* [APInt] Use operator<<= instead of shl where possible. NFCCraig Topper2017-04-231-10/+10
* [APInt] Use lshrInPlace to replace lshr where possibleCraig Topper2017-04-181-4/+4
* Revert "Instrument SDISel C++ patterns"Quentin Colombet2017-04-011-327/+322
* Instrument SDISel C++ patternsQuentin Colombet2017-04-011-322/+327
* [AArch64] Add new subtarget feature to fold LSL into address mode.Balaram Makam2017-03-311-3/+44
* [AArch64] Fix useful bits detection for BFM instructionsSilviu Baranga2016-11-301-9/+38
OpenPOWER on IntegriCloud