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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-04-23 11:11:34 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-04-23 11:11:34 +0000 |
| commit | e7a68fd93e822ebb8069cb8f675b369ccb879721 (patch) | |
| tree | 0840e6741d64cdce8d4d052af6098de858d560b9 /llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | |
| parent | 850361f6c1db6bd8a85b65a8c56e0e097eaa0635 (diff) | |
| download | bcm5719-llvm-e7a68fd93e822ebb8069cb8f675b369ccb879721.tar.gz bcm5719-llvm-e7a68fd93e822ebb8069cb8f675b369ccb879721.zip | |
Fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFCI.
llvm-svn: 358969
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index 23d8adcde39..3b27b9f5b02 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -710,7 +710,7 @@ bool AArch64DAGToDAGISel::SelectAddrModeIndexedBitWidth(SDValue N, bool IsSigned if (IsSignedImm) { int64_t RHSC = RHS->getSExtValue(); unsigned Scale = Log2_32(Size); - int64_t Range = 0x1 << (BW-1); + int64_t Range = 0x1LL << (BW - 1); if ((RHSC & (Size - 1)) == 0 && RHSC >= -(Range << Scale) && RHSC < (Range << Scale)) { @@ -726,7 +726,7 @@ bool AArch64DAGToDAGISel::SelectAddrModeIndexedBitWidth(SDValue N, bool IsSigned // unsigned Immediate uint64_t RHSC = RHS->getZExtValue(); unsigned Scale = Log2_32(Size); - uint64_t Range = 0x1 << BW; + uint64_t Range = 0x1ULL << BW; if ((RHSC & (Size - 1)) == 0 && RHSC < (Range << Scale)) { Base = N.getOperand(0); |
