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| author | Tim Northover <tnorthover@apple.com> | 2018-01-23 15:11:27 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2018-01-23 15:11:27 +0000 |
| commit | f9b560aa8e665359f797c476e074d15d1368dac8 (patch) | |
| tree | ff3754e070a87f13c9003728753baae52f07d4ea /llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | |
| parent | 82b59ae4281b96cb6b5df5208778e2956bc1b26d (diff) | |
| download | bcm5719-llvm-f9b560aa8e665359f797c476e074d15d1368dac8.tar.gz bcm5719-llvm-f9b560aa8e665359f797c476e074d15d1368dac8.zip | |
AArch64: get type from correct result when forming BFX
Some nodes produce multiple values so when obtaining the type of an ISD::OR we
need to make sure we ask for the correct one. Hopefully that's all of them.
llvm-svn: 323205
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index 9789193def8..9aa7c031e60 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -1681,7 +1681,7 @@ static bool isBitfieldExtractOpFromShr(SDNode *N, unsigned &Opc, SDValue &Opd0, // later find more redundancy. Opd0 = N->getOperand(0).getOperand(0); TruncBits = Opd0->getValueType(0).getSizeInBits() - VT.getSizeInBits(); - VT = Opd0->getValueType(0); + VT = Opd0.getValueType(); assert(VT == MVT::i64 && "the promoted type should be i64"); } else if (BiggerPattern) { // Let's pretend a 0 shift left has been performed. |
