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* [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed objectDaniel Frampton2020-06-251-15/+38
* [AArch64] Fix mismatch in prologue and epilogue for funclets on WindowsDaniel Frampton2020-06-251-28/+20
* [AARch64] Add Marvell ThunderX3T110 supportWei Zhao2020-06-1714-15/+2056
* [AArch64] Fix BTI instruction emission.Daniel Kiss2020-06-161-3/+5
* [AArch64] Fix BTI landing pad generation.Daniel Kiss2020-06-161-0/+4
* [FPEnv][AArch64] Add lowering of f128 STRICT_FSETCCJohn Brawn2020-02-181-2/+4
* [FPEnv][AArch64] Add lowering and instruction selection for strict conversionsJohn Brawn2020-02-182-24/+54
* [FPEnv][AArch64] Add lowering and instruction selection for STRICT_FP_ROUNDJohn Brawn2020-02-182-8/+16
* Add lowering of STRICT_FSETCC and STRICT_FSETCCSJohn Brawn2020-02-183-11/+57
* [AArch64] Add option to enable/disable load-store renaming.Florian Hahn2020-02-101-0/+7
* [AArch64][ARM] Always expand ordered vector reductions (PR44600)Nikita Popov2020-02-051-1/+15
* [AArch64] -fpatchable-function-entry=N,0: place patch label after BTIFangrui Song2020-02-031-0/+20
* Add function attribute "patchable-function-prefix" to support -fpatchable-fun...Fangrui Song2020-01-241-2/+1
* [AArch64] Don't rename registers with pseudo defs in Ld/St opt.Florian Hahn2020-01-221-0/+13
* Revert rG6078f2fedcac5797ac39ee5ef3fd7a35ef1202d5 - "[AArch64][GlobalISel]: S...Simon Pilgrim2020-01-151-38/+1
* [AArch64][SVE] Fold variable into assert to silence unused variable warnings ...Benjamin Kramer2020-01-151-2/+2
* [AArch64][SVE] Add ptest intrinsicsCullen Rhodes2020-01-154-1/+54
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-146-6/+6
* [AArch64][GlobalISel]: Support @llvm.{return,frame}address selection.Amara Emerson2020-01-141-1/+38
* [SVE] Add patterns for MUL immediate instruction.Danilo Carvalho Grael2020-01-142-2/+7
* [AArch64] Fix save register pairing for Windows AAPCSSanne Wouda2020-01-141-4/+16
* Make helper functions static or move them into anonymous namespaces. NFC.Benjamin Kramer2020-01-141-1/+1
* [GlobalISel] Change representation of shuffle masks in MachineOperand.Eli Friedman2020-01-131-6/+3
* [AArch64][SVE] Add patterns for some arith SVE instructions.Danilo Carvalho Grael2020-01-135-10/+67
* [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or belowPablo Barrio2020-01-131-15/+33
* This option allows selecting the TLS size in the local exec TLS model,KAWASHIMA Takahiro2020-01-133-26/+117
* [Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song2020-01-112-3/+1
* [AArch64] Don't generate libcalls for wide shifts on DarwinJessica Paquette2020-01-101-1/+1
* [AArch64] Add isAuthenticated predicate to MCInstDescVedant Kumar2020-01-102-6/+14
* [AArch64] Add function attribute "patchable-function-entry" to add NOPs at fu...Fangrui Song2020-01-101-0/+12
* TableGen/GlobalISel: Add way for SDNodeXForm to work on timmMatt Arsenault2020-01-091-9/+16
* CodeGen: Use LLT instead of EVT in getRegisterByNameMatt Arsenault2020-01-092-2/+2
* [AArch64][GlobalISel] Implement selection of <2 x float> vector splat.Amara Emerson2020-01-092-7/+36
* [GlobalISel][AArch64] Import + select LDR*roW and STR*roW patternsJessica Paquette2020-01-092-46/+182
* [APFloat] Fix checked error assert failuresEhud Katz2020-01-091-2/+2
* Revert "Merge memtag instructions with adjacent stack slots."Evgenii Stepanov2020-01-087-489/+30
* Merge memtag instructions with adjacent stack slots.Evgenii Stepanov2020-01-087-30/+489
* AArch64: add missing Apple CPU names and use them by default.Tim Northover2020-01-084-7/+107
* [MachineOutliner][AArch64] Save + restore LR in noreturn functionsJessica Paquette2020-01-071-1/+11
* [MC] Add parameter `Address` to MCInstrPrinter::printInstructionFangrui Song2020-01-062-5/+5
* [MC] Add parameter `Address` to MCInstPrinter::printInstFangrui Song2020-01-062-10/+11
* Lower TAGPstack with negative offset to SUBG.Evgenii Stepanov2020-01-062-3/+12
* [NFC] Fix trivial typos in commentsJames Henderson2020-01-062-2/+2
* [APFloat] Add recoverable string parsing errors to APFloatEhud Katz2020-01-061-4/+10
* GlobalISel: Add type argument to getRegBankFromRegClassMatt Arsenault2020-01-032-4/+5
* [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG fo...QingShan Zhang2020-01-031-0/+5
* DAG: Use TargetConstant for FENCE operandsMatt Arsenault2020-01-021-3/+3
* Remove unneeded extra variable realArgIdx. NFC.Jay Foad2020-01-021-6/+5
* [AArch64][SVE] Gather loads: pass 32 bit unpacked offsets as nxv2i32Andrzej Warzynski2020-01-021-14/+21
* [LegalizeVectorOps][AArch64] Stop asking for v4f16 fp_round and fp_extend to ...Craig Topper2019-12-311-4/+0
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