| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [GISel][NFC]: Move RegisterBankInfo::getSizeInBits into TargetRegisterInfo. | Aditya Nandakumar | 2018-02-02 | 1 | -0/+22 |
| * | Followup on Proposal to move MIR physical register namespace to '$' sigil. | Puyan Lotfi | 2018-01-31 | 1 | -3/+3 |
| * | MachineFunction: Return reference from getFunction(); NFC | Matthias Braun | 2017-12-15 | 1 | -5/+5 |
| * | [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. | Francis Visoiu Mistrih | 2017-12-07 | 1 | -0/+15 |
| * | [Regalloc] Generate and store multiple regalloc hints. | Jonas Paulsson | 2017-12-05 | 1 | -25/+30 |
| * | [CodeGen] Always use `printReg` to print registers in both MIR and debug | Francis Visoiu Mistrih | 2017-11-30 | 1 | -2/+5 |
| * | [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-30 | 1 | -2/+2 |
| * | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-28 | 1 | -3/+5 |
| * | [CodeGen] Rename functions PrintReg* to printReg* | Francis Visoiu Mistrih | 2017-11-28 | 1 | -7/+7 |
| * | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie | 2017-11-17 | 1 | -3/+3 |
| * | [RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints. | Jonas Paulsson | 2017-11-10 | 1 | -4/+5 |
| * | Move TargetFrameLowering.h to CodeGen where it's implemented | David Blaikie | 2017-11-03 | 1 | -1/+1 |
| * | Reverting r315590; it did not include changes for llvm-tblgen, which is causi... | Aaron Ballman | 2017-10-15 | 1 | -1/+1 |
| * | [dump] Remove NDEBUG from test to enable dump methods [NFC] | Don Hinton | 2017-10-12 | 1 | -1/+1 |
| * | TableGen support for parameterized register class information | Krzysztof Parzyszek | 2017-09-14 | 1 | -2/+5 |
| * | [Target] Fix some Clang-tidy modernize-use-using and Include What You Use war... | Eugene Zelenko | 2017-06-19 | 1 | -5/+15 |
| * | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth | 2017-06-06 | 1 | -1/+1 |
| * | BitVector: add iterators for set bits | Francis Visoiu Mistrih | 2017-05-17 | 1 | -2/+1 |
| * | Move value type list from TargetRegisterClass to TargetRegisterInfo | Krzysztof Parzyszek | 2017-04-24 | 1 | -3/+3 |
| * | Revert r301231: Accidentally committed stale files | Krzysztof Parzyszek | 2017-04-24 | 1 | -2/+2 |
| * | Move value type list from TargetRegisterClass to TargetRegisterInfo | Krzysztof Parzyszek | 2017-04-24 | 1 | -2/+2 |
| * | Move size and alignment information of regclass to TargetRegisterInfo | Krzysztof Parzyszek | 2017-04-24 | 1 | -5/+5 |
| * | Revert "Correct register pressure calculation in presence of subregs" | Stanislav Mekhanoshin | 2017-02-24 | 1 | -9/+0 |
| * | Correct register pressure calculation in presence of subregs | Stanislav Mekhanoshin | 2017-02-23 | 1 | -0/+9 |
| * | Cleanup dump() functions. | Matthias Braun | 2017-01-28 | 1 | -3/+3 |
| * | Add iterator_range<regclass_iterator> to {Target,MC}RegisterInfo, NFC | Krzysztof Parzyszek | 2017-01-25 | 1 | -6/+4 |
| * | Extract LaneBitmask into a separate type | Krzysztof Parzyszek | 2016-12-15 | 1 | -8/+2 |
| * | Clarify rules for reserved regs, fix aarch64 ones. | Matthias Braun | 2016-11-30 | 1 | -0/+30 |
| * | Use the range variant of find instead of unpacking begin/end | David Majnemer | 2016-08-11 | 1 | -1/+1 |
| * | MachineFunction: Return reference for getFrameInfo(); NFC | Matthias Braun | 2016-07-28 | 1 | -2/+2 |
| * | [TargetRegisterInfo] Re-apply r265734. | Quentin Colombet | 2016-04-08 | 1 | -12/+5 |
| * | Revert "[TargetRegisterInfo] Refactor the code to use BitMaskClassIterator." | Quentin Colombet | 2016-04-08 | 1 | -5/+12 |
| * | [TargetRegisterInfo] Refactor the code to use BitMaskClassIterator. | Quentin Colombet | 2016-04-07 | 1 | -12/+5 |
| * | ARM, AArch64, X86: Check preserved registers for tail calls. | Matthias Braun | 2016-04-04 | 1 | -0/+9 |
| * | raw_ostream: << operator for callables with raw_ostream argument | Matthias Braun | 2015-12-04 | 1 | -41/+54 |
| * | Revert "raw_ostream: << operator for callables with raw_stream argument" | Matthias Braun | 2015-12-03 | 1 | -54/+41 |
| * | raw_ostream: << operator for callables with raw_stream argument | Matthias Braun | 2015-12-03 | 1 | -41/+54 |
| * | [X86] Part 1 to fix x86-64 fp128 calling convention. | Chih-Hung Hsieh | 2015-12-03 | 1 | -5/+13 |
| * | TargetRegisterInfo: Introduce PrintLaneMask. | Matthias Braun | 2015-09-25 | 1 | -0/+5 |
| * | Introduce target hook for optimizing register copies | Matt Arsenault | 2015-09-24 | 1 | -0/+41 |
| * | Use function attribute "stackrealign" to decide whether stack | Akira Hatanaka | 2015-09-11 | 1 | -9/+1 |
| * | Targets: commonize some stack realignment code | JF Bastien | 2015-07-20 | 1 | -1/+34 |
| * | TargetRegisterInfo: Provide a way to check assigned registers in getRegAlloca... | Matthias Braun | 2015-07-15 | 1 | -1/+2 |
| * | Introduce register dump helper | Matthias Braun | 2014-11-19 | 1 | -0/+9 |
| * | Convert some EVTs to MVTs where only a SimpleValueType is needed. | Craig Topper | 2014-11-16 | 1 | -1/+1 |
| * | [C++11] More 'nullptr' conversion. In some cases just using a boolean check i... | Craig Topper | 2014-04-14 | 1 | -6/+6 |
| * | Make consistent use of MCPhysReg instead of uint16_t throughout the tree. | Craig Topper | 2014-04-04 | 1 | -1/+1 |
| * | PrintVRegOrUnit | Andrew Trick | 2013-08-23 | 1 | -0/+8 |
| * | Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros. | Michael J. Spencer | 2013-05-24 | 1 | -2/+2 |
| * | Add TargetRegisterInfo::getCoveringLanes(). | Jakob Stoklund Olesen | 2013-05-16 | 1 | -2/+4 |
