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author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-28 12:42:37 +0000 |
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committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-11-28 12:42:37 +0000 |
commit | 9d419d3b0cfda0f85d88633bd8620cd65ccb0498 (patch) | |
tree | e1fa028a9c3a8d514e67b9bac321519331979dea /llvm/lib/CodeGen/TargetRegisterInfo.cpp | |
parent | 8dc603b03147c91ff4e66b8bfc934aad6c4cb4b3 (diff) | |
download | bcm5719-llvm-9d419d3b0cfda0f85d88633bd8620cd65ccb0498.tar.gz bcm5719-llvm-9d419d3b0cfda0f85d88633bd8620cd65ccb0498.zip |
[CodeGen] Rename functions PrintReg* to printReg*
LLVM Coding Standards:
Function names should be verb phrases (as they represent actions), and
command-like function should be imperative. The name should be camel
case, and start with a lower case letter (e.g. openFile() or isFoo()).
Differential Revision: https://reviews.llvm.org/D40416
llvm-svn: 319168
Diffstat (limited to 'llvm/lib/CodeGen/TargetRegisterInfo.cpp')
-rw-r--r-- | llvm/lib/CodeGen/TargetRegisterInfo.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/CodeGen/TargetRegisterInfo.cpp b/llvm/lib/CodeGen/TargetRegisterInfo.cpp index ee63cd5ef19..4e28c4781c2 100644 --- a/llvm/lib/CodeGen/TargetRegisterInfo.cpp +++ b/llvm/lib/CodeGen/TargetRegisterInfo.cpp @@ -68,8 +68,8 @@ bool TargetRegisterInfo::checkAllSuperRegsMarked(const BitVector &RegisterSet, continue; for (MCSuperRegIterator SR(Reg, this); SR.isValid(); ++SR) { if (!RegisterSet[*SR] && !is_contained(Exceptions, Reg)) { - dbgs() << "Error: Super register " << PrintReg(*SR, this) - << " of reserved register " << PrintReg(Reg, this) + dbgs() << "Error: Super register " << printReg(*SR, this) + << " of reserved register " << printReg(Reg, this) << " is not reserved.\n"; return false; } @@ -84,7 +84,7 @@ bool TargetRegisterInfo::checkAllSuperRegsMarked(const BitVector &RegisterSet, namespace llvm { -Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI, +Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI, unsigned SubIdx) { return Printable([Reg, TRI, SubIdx](raw_ostream &OS) { if (!Reg) @@ -106,7 +106,7 @@ Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI, }); } -Printable PrintRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { +Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { return Printable([Unit, TRI](raw_ostream &OS) { // Generic printout when TRI is missing. if (!TRI) { @@ -129,12 +129,12 @@ Printable PrintRegUnit(unsigned Unit, const TargetRegisterInfo *TRI) { }); } -Printable PrintVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { +Printable printVRegOrUnit(unsigned Unit, const TargetRegisterInfo *TRI) { return Printable([Unit, TRI](raw_ostream &OS) { if (TRI && TRI->isVirtualRegister(Unit)) { OS << "%vreg" << TargetRegisterInfo::virtReg2Index(Unit); } else { - OS << PrintRegUnit(Unit, TRI); + OS << printRegUnit(Unit, TRI); } }); } @@ -429,6 +429,6 @@ bool TargetRegisterInfo::regmaskSubsetEqual(const uint32_t *mask0, LLVM_DUMP_METHOD void TargetRegisterInfo::dumpReg(unsigned Reg, unsigned SubRegIndex, const TargetRegisterInfo *TRI) { - dbgs() << PrintReg(Reg, TRI, SubRegIndex) << "\n"; + dbgs() << printReg(Reg, TRI, SubRegIndex) << "\n"; } #endif |