| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [GlobalISel] Don't fall back to FastISel. | Amara Emerson | 2018-01-24 | 1 | -1/+3 |
| * | [DAGCombiner] Bail out if vector size is not a multiple | Sven van Haastregt | 2018-01-24 | 1 | -0/+4 |
| * | [SelectionDAG] Fix codegen of vector stores with non byte-sized elements. | Jonas Paulsson | 2018-01-20 | 3 | -6/+38 |
| * | [SelectionDAG] Teach computeKnownBits about ATOMIC_CMP_SWAP_WITH_SUCCESS bool... | Ulrich Weigand | 2018-01-19 | 1 | -0/+1 |
| * | Remove alignment argument from memcpy/memmove/memset in favour of alignment a... | Daniel Neilson | 2018-01-19 | 1 | -0/+4 |
| * | [TargetLowering] add punctuation for readability; NFC | Sanjay Patel | 2018-01-18 | 1 | -1/+1 |
| * | [SelectionDAG] Convert assert to condtion | Sam Parker | 2018-01-18 | 1 | -3/+2 |
| * | [DAGCombiner] Add a DAG combine to turn a splat build_vector where the splat ... | Craig Topper | 2018-01-18 | 1 | -0/+23 |
| * | [LegalizeDAG] Fix ATOMIC_CMP_SWAP_WITH_SUCCESS legalization. | Eli Friedman | 2018-01-17 | 1 | -2/+2 |
| * | Revert "[DAG] Elide overlapping stores" | Benjamin Kramer | 2018-01-15 | 1 | -20/+21 |
| * | [NFC] Change MemIntrinsicInst::setAlignment() to take an unsigned instead of ... | Daniel Neilson | 2018-01-12 | 1 | -6/+9 |
| * | dag-combine: Transfer debug information when folding (zext (truncate x)) | Adrian Prantl | 2018-01-11 | 1 | -1/+4 |
| * | DAGCombine: Let truncates negate extension through extract-subvector | Zvi Rackover | 2018-01-11 | 1 | -0/+16 |
| * | [VectorLegalizer] Remove broken code in ExpandStore. | Jonas Paulsson | 2018-01-11 | 1 | -28/+0 |
| * | [SelectionDAG][X86] Explicitly store the scale in the gather/scatter ISD nodes | Craig Topper | 2018-01-10 | 5 | -24/+46 |
| * | [SelectionDAGBuilder] Chain prefetches less aggressively. | Jonas Paulsson | 2018-01-10 | 1 | -7/+13 |
| * | [SelectionDAG] Fixed f16-from-vector promotion problem | Tim Renouf | 2018-01-09 | 1 | -1/+7 |
| * | [SelectionDAG] lower math intrinsics to finite version of libcalls when possi... | Sanjay Patel | 2018-01-09 | 3 | -20/+65 |
| * | [DAG] Elide overlapping stores | Nirav Dave | 2018-01-09 | 1 | -21/+20 |
| * | [DAG] Teach BaseIndexOffset to correctly handle with indexed operations | Nirav Dave | 2018-01-08 | 3 | -51/+69 |
| * | [DAGCombine] Fix for PR35761 | Sam Parker | 2018-01-08 | 1 | -4/+10 |
| * | [DAG] Fix for Bug PR34620 - Allow SimplifyDemandedBits to look through bitcasts | Simon Pilgrim | 2018-01-07 | 1 | -0/+6 |
| * | [X86] Make v2i1 and v4i1 legal types without VLX | Craig Topper | 2018-01-07 | 1 | -3/+9 |
| * | [PowerPC] Add an ISD::TRUNCATE to the legalization for ppc_is_decremented_ctr... | Craig Topper | 2018-01-07 | 1 | -13/+2 |
| * | [DAGCombine] Fix for PR37563 | Sam Parker | 2018-01-05 | 1 | -2/+12 |
| * | [DAGCombine] Ensure SDNode use iterator is incremented properly. | Amara Emerson | 2018-01-04 | 1 | -2/+2 |
| * | [DAGCombine] Handle out of range EXTRACT_VECTOR_ELT indices | Simon Pilgrim | 2018-01-03 | 2 | -1/+5 |
| * | Revert r321089: "[DAG] Elide overlapping store" (and subsequent fix in r321204) | Daniel Jasper | 2018-01-02 | 1 | -21/+21 |
| * | [DAGCombine] Fix for PR35765 | Sam Parker | 2018-01-02 | 1 | -1/+0 |
| * | [SelectionDAG] Teach WidenVecOp_Convert to widen the operation if a widened r... | Craig Topper | 2018-01-02 | 1 | -4/+13 |
| * | [SelectionDAG] Remove ifs on getTypeAction being TypeWidenVector from some of... | Craig Topper | 2018-01-02 | 1 | -9/+11 |
| * | [SelectionDAG][X86][AArch64] Require targets to specify the promotion type wh... | Craig Topper | 2018-01-01 | 1 | -37/+21 |
| * | Use phi ranges to simplify code. No functionality change intended. | Benjamin Kramer | 2017-12-30 | 4 | -26/+22 |
| * | Avoid modifying DbgInfo while looping in salvageDebuginfo | Dimitry Andric | 2017-12-28 | 1 | -1/+6 |
| * | [SelectionDAG] Add creating new node debug messages for load, store, gather, ... | Craig Topper | 2017-12-28 | 1 | -8/+24 |
| * | [SelectionDAG] Add some debug print messages to LegalizeVectorOps. | Craig Topper | 2017-12-28 | 1 | -2/+15 |
| * | [DAGCombine] foldBinOpIntoSelect can fail to constant fold in some cases. | Simon Pilgrim | 2017-12-27 | 1 | -6/+8 |
| * | [DAGCombine] visitANDLike - ensure APInt is is in range for getSExtValue/getZ... | Simon Pilgrim | 2017-12-26 | 1 | -4/+7 |
| * | [DAGCombine] Don't combine (and (setne X, 0), (setne X, -1)) --> (setuge (add... | Simon Pilgrim | 2017-12-26 | 1 | -1/+2 |
| * | [DAGCombiners] Don't turn ANDs to shuffles with zero so early. Give some othe... | Craig Topper | 2017-12-24 | 1 | -7/+8 |
| * | [SelectionDAG] Teach SelectionDAG::getNode to constant fold zext/aext/sext of... | Craig Topper | 2017-12-23 | 1 | -0/+3 |
| * | [SelectionDAG][X86] Don't use ->getValueType(0) after a call to getOperand to... | Craig Topper | 2017-12-23 | 3 | -7/+7 |
| * | [DAG] Add missing case check from findbaseoffset merge from r321389. | Nirav Dave | 2017-12-22 | 1 | -2/+4 |
| * | Integrate findBaseOffset address analyses to BaseIndexOffset. NFCI. | Nirav Dave | 2017-12-22 | 2 | -70/+27 |
| * | Revert "[DAG] Integrate findBaseOffset address analyses to BaseIndexOffset. N... | Nirav Dave | 2017-12-22 | 2 | -27/+70 |
| * | [SelectionDAG] Reverse the order of operands in the ISD::ADD created by Targe... | Craig Topper | 2017-12-22 | 1 | -1/+1 |
| * | [DAG] Integrate findBaseOffset address analyses to BaseIndexOffset. NFCI. | Nirav Dave | 2017-12-22 | 2 | -70/+27 |
| * | [DAGCombine] Revert r321259 | Sam Parker | 2017-12-22 | 1 | -26/+0 |
| * | [DAGCombiner] Remove (xor (xor x, c1), c2) -> (xor x, (xor c1, c2)) fold. NFCI. | Simon Pilgrim | 2017-12-21 | 1 | -15/+0 |
| * | [DAGCombiner] Generalize (or (and X, c1), c2) -> (and (or X, c2), c1|c2) comb... | Simon Pilgrim | 2017-12-21 | 1 | -10/+10 |
