summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SelectionDAG
diff options
context:
space:
mode:
authorDaniel Neilson <dneilson@azul.com>2018-01-12 21:33:37 +0000
committerDaniel Neilson <dneilson@azul.com>2018-01-12 21:33:37 +0000
commit2409d2420156d34036c9d5e710cf790cee1746d9 (patch)
tree1747420bd1676e20ea3231ad85e759284438c944 /llvm/lib/CodeGen/SelectionDAG
parent44dfa1de3b79335ae59df168b9bf9775cdb35c99 (diff)
downloadbcm5719-llvm-2409d2420156d34036c9d5e710cf790cee1746d9.tar.gz
bcm5719-llvm-2409d2420156d34036c9d5e710cf790cee1746d9.zip
[NFC] Change MemIntrinsicInst::setAlignment() to take an unsigned instead of a Constant
Summary: In preparation for https://reviews.llvm.org/D41675 this NFC changes this prototype of MemIntrinsicInst::setAlignment() to accept an unsigned instead of a Constant. llvm-svn: 322403
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp15
1 files changed, 9 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 1c15a3ce13c..27af4296552 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -5008,13 +5008,14 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
case Intrinsic::longjmp:
return &"_longjmp"[!TLI.usesUnderscoreLongJmp()];
case Intrinsic::memcpy: {
+ const auto &MCI = cast<MemCpyInst>(I);
SDValue Op1 = getValue(I.getArgOperand(0));
SDValue Op2 = getValue(I.getArgOperand(1));
SDValue Op3 = getValue(I.getArgOperand(2));
- unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
+ unsigned Align = MCI.getAlignment();
if (!Align)
Align = 1; // @llvm.memcpy defines 0 and 1 to both mean no alignment.
- bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
+ bool isVol = MCI.isVolatile();
bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget());
SDValue MC = DAG.getMemcpy(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
false, isTC,
@@ -5024,13 +5025,14 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
return nullptr;
}
case Intrinsic::memset: {
+ const auto &MSI = cast<MemSetInst>(I);
SDValue Op1 = getValue(I.getArgOperand(0));
SDValue Op2 = getValue(I.getArgOperand(1));
SDValue Op3 = getValue(I.getArgOperand(2));
- unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
+ unsigned Align = MSI.getAlignment();
if (!Align)
Align = 1; // @llvm.memset defines 0 and 1 to both mean no alignment.
- bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
+ bool isVol = MSI.isVolatile();
bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget());
SDValue MS = DAG.getMemset(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
isTC, MachinePointerInfo(I.getArgOperand(0)));
@@ -5038,13 +5040,14 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
return nullptr;
}
case Intrinsic::memmove: {
+ const auto &MMI = cast<MemMoveInst>(I);
SDValue Op1 = getValue(I.getArgOperand(0));
SDValue Op2 = getValue(I.getArgOperand(1));
SDValue Op3 = getValue(I.getArgOperand(2));
- unsigned Align = cast<ConstantInt>(I.getArgOperand(3))->getZExtValue();
+ unsigned Align = MMI.getAlignment();
if (!Align)
Align = 1; // @llvm.memmove defines 0 and 1 to both mean no alignment.
- bool isVol = cast<ConstantInt>(I.getArgOperand(4))->getZExtValue();
+ bool isVol = MMI.isVolatile();
bool isTC = I.isTailCall() && isInTailCallPosition(&I, DAG.getTarget());
SDValue MM = DAG.getMemmove(getRoot(), sdl, Op1, Op2, Op3, Align, isVol,
isTC, MachinePointerInfo(I.getArgOperand(0)),
OpenPOWER on IntegriCloud