| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Replace a few more "fall through" comments with LLVM_FALLTHROUGH | Justin Bogner | 2016-08-17 | 1 | -1/+1 |
| * | [SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, getStore,... | Justin Lebar | 2016-07-15 | 1 | -19/+14 |
| * | [CodeGen,Target] Remove the version of DAG.getVectorShuffle that takes a poin... | Craig Topper | 2016-07-01 | 1 | -3/+2 |
| * | [SelectionDAG] Attempt to split BITREVERSE vector legalization into BSWAP and... | Simon Pilgrim | 2016-05-12 | 1 | -5/+32 |
| * | [SelectionDAG] BITREVERSE vector legalization of bit operations (REAPPLIED) | Simon Pilgrim | 2016-05-04 | 1 | -2/+2 |
| * | Revert r268504 | Simon Pilgrim | 2016-05-04 | 1 | -2/+2 |
| * | [SelectionDAG] BITREVERSE vector legalization of bit operations | Simon Pilgrim | 2016-05-04 | 1 | -2/+2 |
| * | [SelectionDAG] Teach LegalizeVectorOps to directly Expand CTTZ_ZERO_UNDEF/CTL... | Craig Topper | 2016-04-21 | 1 | -3/+5 |
| * | LegalizeDAG: Don't replace vector store with integer if not legal | Matt Arsenault | 2016-03-30 | 1 | -41/+27 |
| * | LegalizeDAG: Don't replace vector load with integer unless legal | Matt Arsenault | 2016-03-30 | 1 | -28/+21 |
| * | [X86][SSE] Reapplied: Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_... | Simon Pilgrim | 2016-03-10 | 1 | -1/+1 |
| * | [CodeGen] Document and use getConstant's splat-building feature. NFC. | Ahmed Bougacha | 2016-02-15 | 1 | -4/+1 |
| * | [CodeGen] Prefer "if (SDValue R = ...)" to "if (R.getNode())". NFCI. | Ahmed Bougacha | 2016-02-09 | 1 | -2/+1 |
| * | [SelectionDAG] Teach LegalizeVectorOps to not unroll CTLZ_ZERO_UNDEF and CTTZ... | Craig Topper | 2015-12-27 | 1 | -0/+14 |
| * | AMDGPU: Use generic bitreverse intrinsic | Matt Arsenault | 2015-12-14 | 1 | -1/+24 |
| * | Revert r248483, r242546, r242545, and r242409 - absdiff intrinsics | Hal Finkel | 2015-12-11 | 1 | -34/+0 |
| * | AVX-512: Fixed masked load / store instruction selection for KNL. | Elena Demikhovsky | 2015-12-07 | 1 | -1/+4 |
| * | Fix some places where we were assuming that memory type had been legalized | Eric Christopher | 2015-11-25 | 1 | -1/+1 |
| * | Do not use "else" when both branches return (NFC) | Mehdi Amini | 2015-10-27 | 1 | -2/+1 |
| * | Two switch blocks in VectorLegalizer::LegalizeOp already have a | Artyom Skrobov | 2015-10-20 | 1 | -0/+1 |
| * | Combining DIV+REM->DIVREM doesn't belong in LegalizeDAG; move it over into DA... | Artyom Skrobov | 2015-10-20 | 1 | -0/+2 |
| * | SelectionDAG: Remove implicit ilist iterator conversions, NFC | Duncan P. N. Exon Smith | 2015-10-13 | 1 | -1/+1 |
| * | Codegen: Fix llvm.*absdiff semantic. | Mohammad Shahid | 2015-09-24 | 1 | -16/+22 |
| * | propagate fast-math-flags on DAG nodes | Sanjay Patel | 2015-09-16 | 1 | -2/+4 |
| * | Add new ISD nodes: ISD::FMINNAN and ISD::FMAXNAN | James Molloy | 2015-08-11 | 1 | -0/+2 |
| * | [Codegen] Add intrinsics 'absdiff' and corresponding SDNodes for absolute dif... | James Molloy | 2015-07-16 | 1 | -0/+28 |
| * | Make TargetLowering::getShiftAmountTy() taking DataLayout as an argument | Mehdi Amini | 2015-07-09 | 1 | -5/+8 |
| * | Make TargetLowering::getPointerTy() taking DataLayout as an argument | Mehdi Amini | 2015-07-09 | 1 | -8/+12 |
| * | Redirect DataLayout from TargetMachine to Module in SelectionDAG | Mehdi Amini | 2015-07-07 | 1 | -2/+2 |
| * | Convert a bunch of loops to foreach. NFC. | Pete Cooper | 2015-06-26 | 1 | -2/+2 |
| * | Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC) | Alexander Kornienko | 2015-06-23 | 1 | -1/+1 |
| * | Fixed/added namespace ending comments using clang-tidy. NFC | Alexander Kornienko | 2015-06-19 | 1 | -1/+1 |
| * | Add SDNodes for umin, umax, smin and smax. | James Molloy | 2015-05-15 | 1 | -0/+4 |
| * | Masked gather and scatter intrinsics - enabled codegen for KNL. | Elena Demikhovsky | 2015-05-03 | 1 | -2/+6 |
| * | Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" | Sergey Dmitrouk | 2015-04-28 | 1 | -25/+28 |
| * | Revert "[DebugInfo] Add debug locations to constant SD nodes" | Daniel Jasper | 2015-04-28 | 1 | -28/+25 |
| * | [DebugInfo] Add debug locations to constant SD nodes | Sergey Dmitrouk | 2015-04-28 | 1 | -25/+28 |
| * | fix typo and 80-col; NFC | Sanjay Patel | 2015-03-27 | 1 | -2/+2 |
| * | [SDAG] Handle LowerOperation returning its input consistently | Hal Finkel | 2015-02-24 | 1 | -3/+7 |
| * | [SDAG] Use correct alignments on expanded vector trunc-store/ext-loads | Hal Finkel | 2015-02-22 | 1 | -4/+7 |
| * | [SDAG] Don't try to use FP_EXTEND/FP_ROUND for int<->fp promotions | Hal Finkel | 2015-02-12 | 1 | -3/+5 |
| * | Fixes a bug in vector load legalization that confused bits and bytes. | Michael Kuperstein | 2015-02-04 | 1 | -3/+3 |
| * | [SelectionDAG] Allow targets to specify legality of extloads' result | Ahmed Bougacha | 2015-01-08 | 1 | -1/+2 |
| * | Add minnum / maxnum codegen | Matt Arsenault | 2014-10-21 | 1 | -0/+2 |
| * | Teach the AArch64 backend about v4f16 and v8f16 | Oliver Stannard | 2014-08-27 | 1 | -6/+17 |
| * | Make sure no loads resulting from load->switch DAGCombine are marked invariant | Louis Gerbarg | 2014-07-31 | 1 | -3/+3 |
| * | [x86] Make vector legalization of extloads work more like the "normal" | Chandler Carruth | 2014-07-24 | 1 | -5/+22 |
| * | AA metadata refactoring (introduce AAMDNodes) | Hal Finkel | 2014-07-24 | 1 | -5/+5 |
| * | [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous | Chandler Carruth | 2014-07-10 | 1 | -0/+66 |
| * | Make it possible for ints/floats to return different values from getBooleanCo... | Daniel Sanders | 2014-07-10 | 1 | -3/+3 |
