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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-03-10 20:40:26 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-03-10 20:40:26 +0000 |
| commit | 61eb49e437d7a35d3f7e7146391804553e2ade2e (patch) | |
| tree | dc176c05b488ab3976ec216435ffa348de38868e /llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
| parent | 3c8fc57e16839194b4eb569b6fb35eda03249aeb (diff) | |
| download | bcm5719-llvm-61eb49e437d7a35d3f7e7146391804553e2ade2e.tar.gz bcm5719-llvm-61eb49e437d7a35d3f7e7146391804553e2ade2e.zip | |
[X86][SSE] Reapplied: Improve vector ZERO_EXTEND by combining to ZERO_EXTEND_VECTOR_INREG
Generalise the existing SIGN_EXTEND to SIGN_EXTEND_VECTOR_INREG combine to support zero extension as well and get rid of a lot of unnecessary ANY_EXTEND + mask patterns.
Reapplied with a fix for PR26870 (avoid premature use of TargetConstant in ZERO_EXTEND_VECTOR_INREG expansion).
Differential Revision: http://reviews.llvm.org/D17691
llvm-svn: 263159
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index e9f24a17408..f8c2f1b1fc6 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -863,7 +863,7 @@ SDValue VectorLegalizer::ExpandZERO_EXTEND_VECTOR_INREG(SDValue Op) { int NumSrcElements = SrcVT.getVectorNumElements(); // Build up a zero vector to blend into this one. - SDValue Zero = DAG.getTargetConstant(0, DL, SrcVT); + SDValue Zero = DAG.getConstant(0, DL, SrcVT); // Shuffle the incoming lanes into the correct position, and pull all other // lanes from the zero vector. |
